Read Buffer Allocation Across Memory Dies for Lower Latency

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Solution Overview

Problem

Existing memory systems face inefficiencies due to uneven read buffer allocation across multiple memory dies, leading to increased latency and reduced throughput as some dies become idle while others utilize all available buffer, causing imbalanced processing.

Innovation Solution

A memory system balances read buffer allocation by determining an order for command execution based on current buffer allocation and requests, partitioning commands across dies, and limiting buffer availability to each die, ensuring balanced usage and preventing a single die from using all buffer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If read buffer is allocated to memory dies without balancing, then some dies can utilize all available buffer, but other dies become idle causing increased latency and reduced throughput

Engineering Contradiction:
ImprovethroughputVSAvoidlatency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent segments the read buffer into multiple portions, with each portion allocated to a specific memory die. The buffer management component divides the total buffer into first read buffer portion for first memory die and second read buffer portion for second memory die, ensuring each die has dedicated buffer resources and can operate independently without waiting for other dies.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements local quality by allowing different memory dies to have different buffer allocation characteristics based on their individual needs and command types. The buffer management component can allocate different sizes of read buffer portions to different dies based on the specific read commands being processed, optimizing each die's performance independently.

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If read buffer is allocated without balancing across multiple dies, then buffer availability is maximized for active dies, but idle dies reduce overall system efficiency

Engineering Contradiction:
Improvebuffer availabilityVSAvoidsystem efficiency
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The read buffer is segmented into multiple portions that are simultaneously allocated to different memory dies. The buffer management component maintains multiple buffer portions in parallel, allowing each die to have sufficient buffer availability while preventing any single die from monopolizing the entire buffer resource.

Inventive Principle:
Principle #1Segmentation

3Ease of operation

If sequential command processing is used, then commands are processed in order received, but buffer allocation becomes imbalanced causing some dies to wait

Engineering Contradiction:
Improvecommand processing orderVSAvoidcommand processing efficiency
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent segments the command processing flow by creating separate processing paths for different memory dies. The buffer management component allocates specific buffer portions to specific dies, allowing parallel processing of commands across multiple dies while maintaining the ability to process commands in sequential order if needed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The buffer management component performs preliminary buffer allocation before command execution, determining the order of command execution based on buffer allocation status. This preliminary action ensures that buffer resources are prepared in advance, preventing dies from waiting during command execution.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12461688B2Read buffer allocation balance between multiple memory dies
Publication Date: 2025.11.04 MICRON TECHNOLOGY INC
  • US12461688B2 patent drawing
  • US12461688B2 patent drawing
  • US12461688B2 patent drawing

AI summary

Methods, systems, and devices for read buffer allocation balance between multiple memory dies are described. A memory system may transfer multiple device commands to various command queues in which each queue is associated with a respective memory die of the memory system. The memory system may determine an order for execution of the commands based on amounts of a buffer currently allocated to each memory die, amounts of a buffer request for each command, or both. The memory system may process the commands of each queue based on the order for execution and allocate buffer to respective memory dies based on the processed commands. The memory system may perform the commands, deallocate respective portions of the buffer associated with the commands, and transfer more device commands to each command queue.