Read Channel Asynchronous Sampling and Fractionally-Spaced Equalization

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Solution Overview

Problem

As the amount of information written to a data storage medium increases, it becomes difficult to reliably read the information and distinguish valid data signals from noise in conventional systems.

Innovation Solution

A read channel comprising an asynchronous analog to digital converter, an interpolator, a fractionally-spaced equalizer, a gain control module, and a sequence detector, which asynchronously samples and synchronously equalizes the analog signal at higher rates than the original data rate, improving signal detection and noise reduction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If information density on data storage medium is increased, then storage capacity is improved, but ability to distinguish valid data signals from noise deteriorates

Engineering Contradiction:
Improveinformation densityVSAvoidsignal detection reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The read channel processes the analog signal through multiple discrete stages: asynchronous sampling at a higher rate, interpolation to generate additional samples, fractionally-spaced equalization to separate signal components, gain control adjustment, and sequence detection. This segmentation of the reading process into distinct functional blocks enables effective signal recovery from high-density recordings by handling signal conditioning and noise filtering at each stage.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system performs preliminary signal conditioning before final detection by asynchronously sampling the analog signal at a rate higher than the data writing rate, generating interpolated samples in advance, and applying fractionally-spaced equalization to pre-process the signal. This preliminary action prepares the signal by reducing aliasing and enhancing signal components before the sequence detector makes final decisions, thereby improving reliability of data retrieval from high-density media.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If asynchronous sampling at higher rate is used, then aliasing errors are reduced, but device complexity increases

Engineering Contradiction:
Improvesampling precisionVSAvoidread channel complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The read channel employs a universal fractionally-spaced equalizer that can operate with asynchronous sampling at higher rates while maintaining compatibility with the overall system architecture. This equalizer structure serves multiple functions: it compensates for channel distortions, handles the higher sampling rate inputs, and works with the interpolated samples to reduce aliasing errors. The gain control module and sequence detector also adapt to process the higher-rate samples, creating a multi-functional read channel that achieves improved sampling precision without proportionally increasing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP1917662B1Read channel apparatus with asynchronous oversampling, synchronous fractionally spaced equalization and digital gain control.
Publication Date: 2009.09.09 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • EP1917662B1 patent drawingFigure 1A
  • EP1917662B1 patent drawingFigure 1B
  • EP1917662B1 patent drawingFigure 2

AI summary

A read channel receiver apparatus and a method are disclosed. The read channel receiver chain comprises an analog to digital converter which asynchronously samples at a fixed rate an analog signal formed by reading a data track, where that data track was written to a data storage medium at a symbol rate, and an upsampler and interpolator interconnected with the analog to digital converter. The receiver further comprises a fractionally-spaced equalizer, where the interpolator provides a signal to the fractionally-spaced equalizer at an interpolation rate greater than the symbol rate. The fractionally-spaced equalizer forms a synchronous equalized signal. The receiver further comprises a digital gain control module interconnected with the fractionally-spaced equalizer, and a sequence detector outputing a maximum likelihood signal sequence.