Read Channel Post-Processing for Parity and Non-Parity Error Correction
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Solution Overview
Problem
Current read channel technologies in magnetic disk drives have limitations in error rate performance as they primarily rely on either parity or non-parity post-processing, failing to correct error events that cannot be detected by parity and often reduce reliability when parity is not used.
Innovation Solution
A method and apparatus that combines parity and non-parity post-processing to correct error events, where non-parity detectable errors are considered only if their likelihood exceeds a set threshold, allowing for the selection of the most reliable error event for correction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If only parity post-processing is used for error correction, then error detection capability is improved, but error correction capability for undetectable errors deteriorates
Solution Approach 1:
The patent combines parity-based error detection with non-parity-based error correction (using Viterbi algorithm and reliability metrics) into a unified post-processing system. This merging allows the system to leverage both parity checking for detectable errors and probabilistic methods for undetectable errors, thereby resolving the contradiction between error detection capability and error correction capability.
2Adaptability or versatility
If non-parity post-processing is used instead of parity, then error correction flexibility is improved, but reliability deteriorates
Solution Approach 1:
The patent implements a feedback mechanism where parity check results are used to guide the non-parity-based error correction process. When parity detects an error, the system uses reliability metrics from the Viterbi algorithm to identify and correct the most likely error events. This feedback loop ensures that non-parity methods are applied strategically rather than blindly, maintaining reliability while gaining flexibility.
3Reliability
If combined parity and non-parity post-processing is implemented, then error correction capability is improved, but device complexity increases
Solution Approach 1:
The patent segments the error correction process into distinct stages: parity-based error detection, Viterbi algorithm-based reliability calculation, and selective error correction. By dividing the complex task into manageable segments with clear boundaries and responsibilities, the system achieves high error correction capability while keeping implementation complexity manageable through modular design.
Data Source
AI summary
A method and apparatus for providing a read channel having combined parity and non-parity post processing is disclosed. A post-processor combines parity and non-parity post processing to make both parity and non-parity corrections so that error events that cannot be detected by parity may be corrected. Non-parity detectable error events are only kept for consideration if their likelihood is above a set threshold.