Read Channel ISI Message Passing for Lower-Cost LDPC Decoding

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Solution Overview

Problem

Current data storage devices face inefficiencies in iterative decoding due to reliance on soft output Viterbi algorithm (SOVA) detectors for inter-symbol interference message passing, leading to high processing costs and limited support for every LDPC iteration, resulting in suboptimal error rates and processing efficiency.

Innovation Solution

Implementing a read channel circuit that utilizes inter-symbol interference message passing models to process error event bubble data from SOVA detectors, allowing for improved soft information determination and iterative decoding without relying on SOVA detectors for every iteration, thereby enhancing processing efficiency and error rates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If SOVA detectors are used for every LDPC iteration to provide inter-symbol interference message passing, then error rate performance is improved, but processing cost and complexity increase significantly

Engineering Contradiction:
Improveerror rate performanceVSAvoidprocessing cost
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the iterative decoding process into two distinct types of iterations: global iterations that use SOVA detectors for comprehensive ISI message passing, and local iterations that use simplified ISI-free message passing. This segmentation allows the system to obtain the benefits of SOVA-based error correction when needed (global iterations) while using computationally efficient methods for routine iterations (local iterations), thereby resolving the contradiction between error rate performance and processing complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of applying the computationally expensive SOVA detector to every iteration, the patent applies it partially—specifically, only to global iterations that occur less frequently. The local iterations use a simplified approach that suffices for many cases, eliminating the need for excessive SOVA processing while maintaining acceptable error performance. This partial application of the sophisticated detector resolves the contradiction by avoiding unnecessary complexity.

Inventive Principle:
Principle #16Partial or excessive action

2Reliability

If SOVA detectors are used for every LDPC iteration, then error handling capability is improved, but processing efficiency decreases

Engineering Contradiction:
Improveerror handling capabilityVSAvoidprocessing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent divides the error handling process into global error correction (using SOVA detectors in global iterations) and local error correction (using simplified methods in local iterations). This segmentation enables the system to maintain strong error handling capability through periodic global iterations while achieving high processing efficiency during local iterations, thus resolving the contradiction between reliability and productivity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements periodic global iterations that use SOVA detectors at intervals, rather than continuously. Between global iterations, multiple local iterations perform efficient error handling using simplified ISI-free message passing. This periodic application of the computationally intensive SOVA detector maintains error handling capability while maximizing processing efficiency during the intervals, resolving the contradiction between reliability and productivity.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS11677420B1Externalizing inter-symbol interference data in a data channel
Publication Date: 2023.06.13 WESTERN DIGITAL TECHNOLOGIES INC
  • US11677420B1 patent drawing
  • US11677420B1 patent drawing
  • US11677420B1 patent drawing

AI summary

Example systems, read channel circuits, data storage devices, and methods to use inter-symbol interference message passing (ISI-MP) data in a read channel are described. The read channel circuit includes a soft output detector, such as a soft output Viterbi algorithm (SOVA) detector, configured to determine both the first most likely and second most likely sets of symbols and output inter-symbol interference data based on the adjacent symbols and corresponding ISI in each set of symbols. The inter-symbol interference data may be used by an ISI-MP circuit configured to model ISI-MP and provide feedback to an iterative decoder during local iterations.