Read Circuit for Non-Volatile Memory with Discharge and Equalization
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Solution Overview
Problem
Resistance variable memories face challenges in accurately reading data at low voltages due to varying resistance states, which affects the reliability and speed of non-volatile memory operations, and conventional read circuits struggle with low power consumption and parasitic capacitance issues.
Innovation Solution
The proposed read circuit design includes a current load circuit, discharge circuits, equalization circuits, and differential circuits to compare resistance between memory cells and reference cells, utilizing transistors and signal control to maintain accurate data reading at low voltages while reducing parasitic capacitance and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional read circuits are used at low voltages, then power consumption is reduced, but reading accuracy and reliability deteriorate due to insufficient amplifier gain and increased transistor mismatch
Solution Approach 1:
The patent applies preliminary equalization action by short-circuiting the first and second inputs before reading to equalize their potentials. This preliminary action compensates for parasitic capacitance differences and ensures accurate differential measurement when reading at low voltages, thereby maintaining reading accuracy while enabling low power consumption operation.
Solution Approach 2:
The patent introduces discharge circuits as intermediary elements that control the potentials of the first and second inputs relative to ground. These discharge circuits act as mediators to establish proper voltage levels and maintain saturation operation of transistors during low-voltage reading, preventing transistor mismatch and amplifier gain degradation while keeping power consumption low.
2Loss of energy
If supply voltage is decreased to reduce power consumption, then energy loss is reduced, but the resistance differences decrease and amplifier gain becomes insufficient
Solution Approach 1:
The equalization circuit performs preliminary action by equalizing the potentials of first and second inputs before the differential amplifier reads the data. This preliminary equalization compensates for imbalances caused by parasitic capacitance, ensuring that the amplifier operates with maximum gain even when supplied with low voltage, thus maintaining sufficient amplifier gain while reducing energy loss.
Solution Approach 2:
The patent changes the operating parameters of the read circuit by introducing controlled discharge paths that maintain proper voltage levels at critical nodes. By dynamically adjusting the discharge signals to keep transistors in saturation region even at low supply voltages, the circuit maintains high amplifier gain while operating at reduced voltage levels, thereby reducing energy loss without sacrificing power.
3Loss of energy
If read circuits operate at very low voltages, then power consumption decreases, but malfunctions increase and circuit functions may stop
Solution Approach 1:
The discharge circuits serve as intermediary control elements that actively manage the voltage levels at the inputs and outputs of the differential amplifier. By introducing these intermediary discharge paths controlled by discharge signals, the circuit maintains stable operation and prevents malfunctions even when the main supply voltage is reduced to very low levels, thereby improving circuit stability while reducing power consumption.
Solution Approach 2:
The equalization circuit performs preliminary action by pre-equalizing the input potentials before the actual reading operation. This preliminary equalization prevents operational failures by ensuring that the differential amplifier starts from a balanced state, reducing the likelihood of malfunctions and improving reliability when operating at very low voltages with reduced power consumption.
4Ease of operation
If conventional current mirror circuits are used, then current control is achieved, but the minimum operating voltage is high due to saturation requirements
Solution Approach 1:
The patent introduces discharge circuits as intermediary elements that provide alternative current paths and voltage control mechanisms. These discharge circuits mediate between the current mirror circuit and the rest of the system, allowing the current mirror to maintain proper current control while the discharge circuits handle the voltage level management, thereby enabling operation at lower minimum voltages without sacrificing current control capability.
Solution Approach 2:
The equalization circuit performs preliminary action by equalizing the potentials at the inputs before the current mirror circuit needs to operate. This preliminary equalization reduces the voltage headroom requirements of the current mirror circuit, allowing it to maintain effective current control at lower operating voltages, thereby reducing the minimum operating voltage while preserving current control ease.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables high-speed, accurate data reading at low voltages with reduced power consumption and improved reliability, addressing the limitations of conventional read circuits by stabilizing operations and minimizing parasitic capacitance effects.
Implementation Method 1
Read circuits convert resistance differences between memory cells and reference cells to currents or voltages, and amplify the currents or voltages with amplifiers to determine digital values
Data Source
AI summary
A read circuit includes a current load circuit configured to supply a load current from a power source to a first input and a second input; a first discharge circuit configured to discharge potential of the first and second inputs to a ground level; an equalization circuit configured to equalize the potential of the first and second inputs; a differential circuit configured to receive the first and second inputs as differential inputs, and to output a first output and a second read output as differential outputs; and a second discharge circuit configured to discharge potential of the first and second read outputs to the ground level.


