Read Circuitry Current Regulation for Memory Cell Sensing
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Solution Overview
Problem
Existing read circuitry for memory cells with electrically floating bodies struggles to accurately sense and determine data states due to variations in current output, which affects the reliability and efficiency of data retrieval in memory cell arrays.
Innovation Solution
The integration of sense amplifier circuitry, current regulation circuitry, and sensing circuitry, which includes a current mirror circuit, to regulate and sense the current on the bit line, allowing for precise determination of data states by controlling the current flow and voltage levels during read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional read circuitry is used to sense memory cell data states, then the reading operation can be performed, but the current output variations cause inaccurate sensing and reduced reliability
Solution Approach 1:
A current regulation circuit is introduced as an intermediary between the memory cell and sense amplifier. This circuit includes a regulation transistor that controls current flow from a current source to the bit line, ensuring consistent current output regardless of memory cell state variations, thereby improving both reliability and measurement precision
Solution Approach 2:
The patent changes the operating parameters of the read circuit by implementing dynamic control of current magnitude and timing. The current regulation circuit adjusts the current source output based on read control signals, optimizing the current parameters to achieve accurate sensing while maintaining consistent output across different memory cell states
2Measurement precision
If higher current is used to improve sensing accuracy, then data state detection becomes more reliable, but adjacent memory cells experience greater disturbance
Solution Approach 1:
The current regulation circuit provides localized current control specifically at the selected memory cell location. By using a regulation transistor controlled by decode signals, the circuit delivers high current only to the specific memory cell being read, while maintaining low current elsewhere, thus achieving accurate sensing without disturbing adjacent cells
Solution Approach 2:
The patent implements dynamic current regulation where the current magnitude is adjusted in real-time based on the read operation requirements. The current source and regulation transistor respond to control signals to provide high current during the sensing window and low current otherwise, optimizing both detection accuracy and minimizing disturbance to neighboring cells
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the reliability and efficiency of data retrieval by accurately sensing data states, maintaining consistent voltage levels, and minimizing disturbance to adjacent memory cells, thus improving the overall performance of memory cell arrays.
Implementation Method 1
sense amplifier circuitry, current regulation circuitry, and sensing circuitry, which includes a current mirror circuit, to regulate and sense the current on the bit line
Implementation Method 2
each memory cell includes an electrically floating body transistor including a body region which is electrically floating
Data Source
AI summary
An integrated circuit device (e.g., a logic device or a memory device) having a memory cell array which includes (i) a plurality of memory cells, wherein each memory cell is programmable to store one of a plurality of data states, and (ii) a bit line, having a plurality of memory cells coupled thereto. Memory cell control circuitry applies one or more read control signals to perform a read operation wherein, in response to the read control signals, a selected memory cell conducts a current which is representative of the data state stored therein. Sense amplifier circuitry senses the data state stored in the selected memory cell using a signal which is responsive to the current conducted by the selected memory cell. Current regulation circuitry is responsively and electrically coupled to the bit line during a portion of the read operation to sink or source at least a portion of the current provided on the bit line. Sensing circuitry responsively couples the current regulation circuitry to the bit line during the portion of the read operation.