Read Disturb Detection Using Threshold Voltage Distribution

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Solution Overview

Problem

Existing memory systems face challenges in efficiently detecting read disturb, leading to false positives and resource wastage due to time-consuming bit error rate calculations.

Innovation Solution

A memory system evaluates the distribution of threshold voltages relative to a read voltage, determining the quantity of memory cells above a threshold level to assess read disturb, thereby reducing latency and false detection rates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If bit error rate calculation is used to detect read disturb, then detection accuracy is improved, but detection time and resource consumption increase significantly

Engineering Contradiction:
Improveread disturb detection accuracyVSAvoiddetection latency
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent segments the read disturb detection process into two stages: a fast preliminary detection stage using threshold voltage distribution analysis, and a detailed verification stage using bit error rate calculation only when needed. This segmentation reduces overall detection time while maintaining accuracy by avoiding unnecessary full BER calculations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary detection using threshold voltage distribution analysis before committing to full bit error rate calculation. This preliminary action identifies potential read disturb cases efficiently, allowing the system to skip time-consuming BER calculations for cases that don't meet the threshold criteria.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If bit error rate calculation is performed for all memory cells, then detection reliability is improved, but resource consumption and false positives increase

Engineering Contradiction:
Improveread disturb detection reliabilityVSAvoiddetection resource consumption
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent applies different detection methods to different memory cell populations based on their threshold voltage characteristics. Memory cells with threshold voltages in the critical range undergo full BER calculation, while others use faster screening methods. This local quality approach optimizes resource allocation and reduces false positives.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the detection parameter from always using BER calculation to conditionally using threshold voltage distribution analysis based on the measured threshold characteristics. This parameter change allows the system to adapt resource consumption to actual memory cell states, reducing unnecessary energy expenditure.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If threshold voltage distribution analysis is used, then detection speed is improved, but detection precision may be reduced

Engineering Contradiction:
Improvedetection throughputVSAvoidread disturb detection precision
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent segments detection into a fast screening phase using threshold voltage distribution and a precise verification phase using BER calculation. The segmentation allows most cases to be handled quickly while ensuring precise detection for ambiguous cases through the verification phase.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses threshold voltage distribution analysis as an intermediary step between quick rejection and full BER calculation. This intermediary provides additional information that helps determine whether full BER calculation is necessary, improving overall detection precision while maintaining speed advantages.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20260017185A1Read disturb detection in a memory system
Publication Date: 2026.01.15 MICRON TECHNOLOGY INC
  • US20260017185A1 patent drawing
  • US20260017185A1 patent drawing
  • US20260017185A1 patent drawing

AI summary

Methods, systems, and devices for read disturb detection in a memory system are described. A memory system may perform a read operation on a set of memory cells using a read voltage that is between a first target threshold voltage for the set of memory cells and a second target threshold voltage for the set of memory cells. The memory system may determine, based on a quantity of memory cells with a threshold voltage greater than the read voltage being greater than a threshold quantity, a bit error rate for the set of memory cells. And the memory system may determine whether to perform a refresh operation on the set of memory cells based on the bit error rate for the set of memory cells.