Read Disturb Checking in Flash Memory Storage Devices

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Rewritable non-volatile memory modules, such as flash memory, experience data errors and loss due to 'read disturb' phenomena, where repeated read operations lead to error bits and data loss, especially when the read count exceeds certain thresholds, posing a challenge in maintaining data integrity.

Innovation Solution

A read disturb checking method that groups physical erasing units into physical unit groups, monitors read counts, and sets multiple thresholds to determine when to scan specific programming units, thereby reducing the likelihood of data errors by relocating data when error thresholds are exceeded.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If read operations are performed multiple times on physical programming units, then data access frequency increases, but error bits and data loss occur due to read disturb

Engineering Contradiction:
Improvedata access frequencyVSAvoiddata integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent performs preliminary scanning of physical programming units at predetermined read count thresholds (first threshold and second threshold) before actual read disturb occurs. By proactively detecting error bits at lower read counts and relocating data preemptively, the system prevents data loss rather than reacting after damage occurs. This preliminary action allows frequent data access while maintaining integrity through advance intervention.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If all physical programming units are scanned frequently to detect error bits, then data integrity is maintained, but storage space and processing overhead increase

Engineering Contradiction:
Improvedata integrityVSAvoidstorage space requirements
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the scanning process by dividing physical programming units into different scanning scopes based on read count thresholds. At the first threshold, only currently read physical erasing units are scanned. At the second threshold, all physical erasing units in the same physical unit group are scanned. This segmentation reduces overall scanning overhead compared to universal frequent scanning while maintaining data integrity through targeted checks.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the scanning parameter (scan scope) dynamically based on the read count threshold level. The first read count threshold triggers scanning of a limited scope (current physical erasing unit), while the second read count threshold triggers scanning of a broader scope (all physical erasing units in the group). This parameter change allows the system to adapt scanning intensity to actual risk levels, reducing unnecessary storage and processing overhead.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If read count thresholds are set low to detect errors early, then data integrity is protected, but false alarms and unnecessary data relocation increase

Engineering Contradiction:
Improvedata integrityVSAvoidunnecessary data relocation
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent uses two distinct read count thresholds (first threshold and second threshold) with different scanning scopes to optimize the balance between early detection and false alarm reduction. The first threshold triggers limited scanning to catch early errors, while the second threshold triggers comprehensive scanning to confirm patterns and reduce false alarms. This dual-threshold parameter system prevents premature data relocation by requiring evidence at multiple threshold levels before triggering relocation operations.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11797222B2Read disturb checking method, memory storage device and memory control circuit unit
Publication Date: 2023.10.24 PHISON ELECTRONICS
  • US11797222B2 patent drawing
  • US11797222B2 patent drawing
  • US11797222B2 patent drawing

AI summary

A read disturb checking method, a memory storage device, and a memory control circuit unit are provided. The method includes: updating first and second read counts of a first physical unit group according to a total read count of a read operation performed on physical programming units in the first physical unit group; scanning at least one first physical programming unit in a currently read physical erasing unit in response to determining the first read account is greater than a first read count threshold to obtain a first error bit amount; scanning all physical programming units in at least one first physical erasing unit in the first physical unit group in response to determining the second read account is greater than a second read count threshold to obtain a second error bit amount; performing a read disturb prevention operation according to the first or second error bit amount.