Read Margin Control Circuit for Fast Data Valid Window Detection

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Existing memory controllers face challenges in quickly adjusting the sampling point for data input/output signals due to shifts caused by voltage and temperature changes, leading to a decrease in read margin and increased time to determine the data valid window.

Innovation Solution

A read margin control circuit that includes a delay circuit to generate delay signals with different phases, a sampler to sample these signals based on a data strobe signal, and a determiner to determine the data valid window without repeatedly issuing read commands, allowing for precise adjustment of the sampling point within a single read operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the sampling point is adjusted by repeatedly issuing read commands to account for voltage and temperature changes, then the accuracy of data sampling is improved, but the time required to determine the data valid window increases

Engineering Contradiction:

Improvesampling point accuracyVSAvoidtime to determine data valid window

Core Design Contradiction:

Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies preliminary action by performing sampling point adjustment within a single read operation rather than requiring repeated read commands. The read margin control circuit determines the data valid window and adjusts the sampling point concurrently with the data read operation, eliminating the need for separate adjustment phases and reducing overall time while maintaining accuracy.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent merges the sampling point adjustment function with the data read operation. The read margin control circuit integrates the determination of data valid window and sampling point optimization into the same operational cycle as data retrieval, combining multiple functions into a unified process that reduces time loss while preserving measurement precision.

Inventive Principle:

Principle #5Merging (Combining)

2Speed

If the sampling point is fixed after initial training, then the operation speed is improved, but the reliability of data sampling deteriorates under varying voltage and temperature conditions

Engineering Contradiction:

Improveoperation speedVSAvoiddata sampling reliability

Core Design Contradiction:

SpeedVSReliability

Solution Approach 1:

The patent applies dynamics by making the sampling point adjustable and adaptive rather than fixed. The read margin control circuit dynamically determines the data valid window and adjusts the sampling point based on actual signal conditions during operation, allowing the system to adapt to voltage and temperature variations while maintaining both speed and reliability.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent implements feedback through the read margin control circuit that monitors the data input/output signal and data strobe signal relationship, determines the actual data valid window, and adjusts the sampling point accordingly. This closed-loop approach ensures reliable data sampling under varying conditions while maintaining operational efficiency.

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS11200928B2Memory controller and operating method with read margin control circuit determining data valid window

Publication Date: 2021.12.14 SAMSUNG ELECTRONICS CO LTD

AI summary

A read margin control circuit is provided. The read margin control circuit includes a delay circuit that delays a data input/output signal and generates delay signals having different phases from each other, a sampler that samples the delay signals based on a data strobe signal to generate sampling values, and a determiner configured to determine a data valid window of the data input/output signal based on the sampling values.