State-Dependent Read Pass Voltages for Non-Volatile Memory
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Solution Overview
Problem
Non-volatile flash memory devices experience read disturb, where the charge on floating gates is altered during read operations, leading to significant threshold voltage changes over time, especially in unselected memory cells adjacent to selected cells due to unequal coupling and biasing.
Innovation Solution
Implementing state-dependent read pass voltages for adjacent word lines during read operations, where the pass voltage varies based on the read compare voltage applied to the selected word line, to maintain consistent biasing and reduce read disturb, while ensuring proper conduction through the memory string.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a read pass voltage is applied to unselected memory cells during read operations, then proper conduction through the memory string is ensured, but read disturb occurs causing threshold voltage changes in adjacent memory cells
Solution Approach 1:
The patent applies different pass voltages to different groups of unselected word lines based on their proximity to the selected word line. Word lines immediately adjacent to the selected word line receive a first pass voltage, while other unselected word lines receive a second pass voltage. This local differentiation reduces read disturb in adjacent cells while maintaining proper conduction.
Solution Approach 2:
The patent changes the voltage parameter applied to unselected word lines based on their position relative to the selected word line. By adjusting the pass voltage level according to location, the patent optimizes the balance between ensuring conduction and minimizing read disturb effects on threshold voltage.
2Adaptability or versatility
If multiple read voltages are applied to selected memory cells, then multi-state data reading is enabled, but read disturb effects accumulate over multiple reads
Solution Approach 1:
The patent differentiates the treatment of unselected word lines based on their spatial relationship to the selected word line. Adjacent word lines receive specialized pass voltage treatment to minimize read disturb during multi-state reading operations, while other unselected word lines receive standard pass voltage.
Solution Approach 2:
The patent applies appropriate pass voltages to unselected word lines before and during the read operation on the selected word line. This preliminary biasing prevents charge redistribution and read disturb effects from occurring during the multi-state read process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces read disturb by minimizing the impact of read operations on adjacent memory cells, maintaining consistent threshold voltage distributions and extending the lifespan of memory cells by minimizing unintended charge alterations.
Implementation Method 1
the charge on floating gates is altered during read operations, leading to significant threshold voltage changes
Implementation Method 2
unequal coupling and biasing
Data Source
AI summary
Non-volatile memory and methods of reading non-volatile memory are provided for managing and reducing read related disturb. Techniques are introduced to reduce read disturb using state-dependent read pass voltages for particular word lines during a read operation. Because of their proximity to a selected word line, adjacent word lines can be biased using state-dependent pass voltages while other unselected word lines are biased using a standard or second set of pass voltages. Generally, each state-dependent pass voltage applied to a word line adjacent to the selected word line is larger than the second set of pass voltages applied to other unselected word lines, although this is not required. Other word lines, may also be biased using state-dependent pass voltages. System-level techniques are provided with or independently of state-dependent pass voltages to further reduce and manage read disturb. Techniques may account for data validity and memory write and erase cycles.


