Read Reference Current Generator With Segmented TC Controller
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Solution Overview
Problem
Next-generation memory devices face challenges in controlling the temperature coefficient of read reference currents, which affects the accuracy and stability of data read operations, particularly in non-volatile memory technologies like PRAM, RRAM, and MRAM, where resistance values vary with temperature.
Innovation Solution
A read reference current generator is designed with a temperature coefficient (TC) controller that adjusts the temperature coefficient of the read reference current, utilizing a combination of replica circuits and switches to generate branch currents with varying absolute values and temperature coefficients, ensuring a stable and adjustable target read current by controlling the bit line voltage levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a traditional TC controller is used to control the temperature coefficient of read reference current, then the temperature coefficient can be controlled, but the controller size becomes large
Solution Approach 1:
The patent divides the TC controller into multiple independent TC control circuits, each responsible for controlling the temperature coefficient of specific read reference currents. This segmentation allows each sub-circuit to be optimized independently, reducing the overall controller size while maintaining comprehensive temperature coefficient control across all read reference current paths.
2Adaptability or versatility
If multiple read reference currents with different absolute values and temperature coefficients are generated, then the adaptability of the read operation is improved, but the device complexity increases
Solution Approach 1:
The patent employs multiple TC control circuits that are essentially copies of a basic control circuit structure, each tailored to generate read reference currents with specific absolute values and temperature coefficients. This copying approach allows systematic generation of multiple currents while maintaining design consistency and managing complexity through modular replication.
Solution Approach 2:
The patent implements dynamic control of read reference currents by enabling the selection and adjustment of different current magnitudes and temperature coefficients based on operating conditions. The TC control circuits dynamically adjust current parameters to match temperature variations and read operation requirements, enhancing adaptability without permanent hardware complexity.
3Measurement precision
If the temperature coefficient control is implemented for all read reference currents, then the read accuracy is improved, but the manufacturing complexity increases
Solution Approach 1:
By segmenting the TC control functionality into separate, standardized control circuits for each read reference current path, the patent enables independent optimization and testing of each segment. This segmentation simplifies the manufacturing process by allowing modular assembly and quality control, reducing overall manufacturing complexity while ensuring temperature coefficient control across all current paths for high read accuracy.
Data Source
AI summary
A read reference current generator includes a temperature coefficient (TC) controller configured to adjust a temperature coefficient in response to a first control signal and generate a read reference current having an adjusted temperature coefficient, a plurality of replica circuits configured to receive the read reference current and adjust an absolute value of the read reference current with different scale factors to generate a plurality of branch currents, and a plurality of switches configured to control connection of the TC controller and the plurality of replica circuits in response to a second control signal, wherein an equivalent resistance value of each of the plurality of replica circuits corresponds to a multiple of an equivalent resistance value of a data read path, and the data read path includes a selected memory cell and a clamping circuit clamping a voltage level of a selected bit line to a determined value.