Spatially Local Read Request Packing for CXL Flit Efficiency
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Solution Overview
Problem
Existing communication interfaces, particularly in CXL-related bidirectional interfaces, suffer from low bandwidth utilization due to inefficient packing of read requests, leading to reduced data payload efficiency and suboptimal use of available flit slots.
Innovation Solution
The solution involves combining spatially-local read requests into a single request, utilizing bit vectors in the CXL header to encode multiple addresses, thereby reducing the number of slots occupied by individual read requests and optimizing flit packing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple individual read requests are transmitted separately through the interconnect network, then each request can be processed independently, but the bandwidth utilization is low and the number of flit slots occupied is high
Solution Approach 1:
The patent combines multiple individual read requests into a single composite read request that can be transmitted through the interconnect network in fewer flit slots. This merging approach consolidates multiple address specifications and data payloads into one unified request structure, reducing the total number of flit transmissions required while maintaining the ability to access multiple memory locations efficiently
2Productivity
If read requests are transmitted as individual packets, then flow control can be applied to each request separately, but the data payload efficiency is reduced
Solution Approach 1:
The patent merges multiple read requests with their respective data payloads into a single composite request structure. This allows the data payload to be transmitted more efficiently by consolidating multiple payloads into one transmission unit, thereby increasing the proportion of useful data relative to overhead and improving overall data payload efficiency
3Use of energy by moving object
If separate read requests are sent for spatially-local addresses, then address-specific processing is maintained, but the power consumption increases due to suboptimal use of flit slots
Solution Approach 1:
The patent combines multiple read requests targeting spatially-local addresses into a single composite request, thereby optimizing flit slot utilization. This reduction in the number of transmissions directly decreases power consumption while maintaining the ability to access multiple nearby memory locations, resolving the trade-off between energy efficiency and productivity
Data Source
AI summary
Provided is a memory system and a method for improving bandwidth utilization in the memory system that includes receiving, at a host processor, a first read request from an input buffer, determining a combinable address range associated with the first read request, identifying one or more additional read requests in the input buffer having access addresses within the combinable address range, when one or more additional read requests are identified, modifying the first read request to represent the one or more additional read requests using a bit vector indicating their presence within the combinable address range, packing the modified first read request into a single slot of an outgoing flit, and transmitting the flit over an outgoing communication link.