Read Retry Voltage Sequencing Based on Decoding Success Trends
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Solution Overview
Problem
Flash memory experiences high error rates due to variations in memory cells during manufacture and aging, leading to increased latency in read operations when using error correcting codes like LDPC and BCH, which can be inefficient in retrying and decoding data.
Innovation Solution
The technology employs a multi-stage decoding operation that adjusts read-level voltages based on a decoding success trend to predict error types and optimize read retries, reducing the number of retries and improving error recovery efficiency by leveraging similarities in read errors among memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correcting codes (LDPC and BCH) are applied to correct data errors during read operations, then data reliability is improved, but read operation latency increases
Solution Approach 1:
The patent applies preliminary action by performing read operations with multiple read-level voltages in advance and storing the results in a read buffer before decoding is needed. This allows the decoding operation to work with pre-fetched data from multiple voltage levels, reducing the overall latency while maintaining reliability through error correction capabilities.
Solution Approach 2:
The patent implements dynamics by dynamically adjusting the sequence of read-level voltages based on decoding success trends. The system monitors whether decoding successes are increasing or decreasing and reverses the voltage sequence direction accordingly, optimizing the read operation efficiency while maintaining data reliability through adaptive error correction strategies.
2Reliability
If multiple read-level voltages are used in multi-stage decoding operations, then error recovery efficiency is improved, but the number of read retries increases
Solution Approach 1:
The patent applies feedback by monitoring decoding success trends and using this information to dynamically adjust the read-level voltage sequence. The system counts decoding successes and reverses the voltage sequence direction when trends indicate declining success rates, thereby optimizing error recovery efficiency while minimizing the number of retries needed.
Solution Approach 2:
The patent performs preliminary read operations at multiple voltage levels and stores results in a buffer before decoding is required. This pre-fetching strategy allows the system to have multiple candidate readings ready, reducing the need for additional retry operations while maintaining high error recovery efficiency through selective use of pre-fetched data.
3Device complexity
If read-level voltage sequence is fixed, then device complexity is reduced, but adaptability to different error conditions deteriorates
Solution Approach 1:
The patent implements dynamics by making the read-level voltage sequence adaptive rather than fixed. The system dynamically reverses the voltage sequence direction based on decoded success trends, allowing it to adapt to different error conditions and memory cell states while maintaining relatively simple control logic through a straightforward reversal mechanism.
Solution Approach 2:
The patent applies parameter changes by modifying the read-level voltage sequence direction (reversing it) based on decoding success trends. This simple parameter change allows the system to adapt to different error conditions and memory cell aging states without requiring complex control logic, maintaining low device complexity while improving adaptability.
Data Source
AI summary
Methods, systems, and media for decoding data are described. A sequence of read-level voltages for decoding operations may be determined based on a trend of decoding success indicators, including a first decoding success indicator and a second decoding success indicator. The first decoding success indicator is obtained from a more recent successful decoding operation. The first one of the sequence may be set to a read-level voltage of the first decoding success indicator. If the read-level voltage of the first decoding success indicator is less than a read-level voltage of the second decoding success indicator, then the trend is decreasing, and the second one of the sequence may be set to a read-level voltage less than that of the first one of the sequence. After executing one or more decoding operations, the decoding success indicators may be updated based on the read-level voltage of the current successful decoding operation.