Read Strobe Gating Mechanism for Memory Controller Timing
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Solution Overview
Problem
The variability in the read data strobe phase relative to the clock signal, due to both low and high frequency fluctuations, makes it difficult for memory controllers to accurately predict the window for reading valid data, leading to issues such as reading spurious strobe edges or missing valid data.
Innovation Solution
A memory controller with a gating adjustment circuit that extends the read window by generating an adjusted gating signal based on the timing reference signal, ensuring that only valid strobe edges are passed through, thereby preventing spurious edges and invalid data from being read.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the memory controller uses a fixed read window based on estimated timing, then the device complexity is low, but the reliability deteriorates due to high frequency fluctuations in DQS phase causing spurious edges to be read
Solution Approach 1:
The patent applies dynamics by making the read window dynamic rather than fixed. The gating circuit adjusts the read window timing based on the actual DQS phase detected during training, allowing the window to adapt to high frequency fluctuations in DQS phase while maintaining low complexity through simple gating logic controlled by training results.
Solution Approach 2:
The patent uses preliminary action by performing read strobe training before normal data operations. During training, the system determines the appropriate read window timing in advance, storing these settings for use during subsequent data reads. This preliminary calibration eliminates the need for complex real-time adjustments during normal operation.
2Reliability
If the memory controller extends the read window to compensate for variations, then the reliability improves by capturing all valid edges, but the productivity deteriorates due to increased time for each read operation
Solution Approach 1:
The patent applies local quality by extending the read window only in the specific time regions where valid DQS edges may occur, rather than uniformly extending it across all time periods. The gating circuit is configured to be sensitive only during the relevant portion of the extended window, maintaining fast response for valid edges while filtering out spurious ones.
3Productivity
If the memory controller uses a narrow read window for fast operation, then the productivity is high, but the measurement precision deteriorates because it cannot accurately detect the variable DQS phase
Solution Approach 1:
The patent uses preliminary action by performing read strobe training before normal data operations. During training, the system determines the appropriate read window timing in advance, storing these settings for use during subsequent data reads. This preliminary calibration eliminates the need for complex real-time adjustments during normal operation.
Data Source
AI summary
A memory controller that extends the window when reading data from the memory device to compensate for fluctuations in a read strobe delay. The memory controller includes a communication port that receives a timing reference signal for reading data from a memory device. A control circuit generates a gating signal indicative of a read window. A gating adjustment circuit generates an adjusted gating signal indicative of an adjusted read window based on the gating signal and the timing reference signal. A gating circuit generates a first gated timing reference signal for reading data by gating a delayed version of the timing reference signal with the adjusted gating signal.