Read Voltage Calibration for Memory Storage Devices

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Solution Overview

Problem

As rewritable non-volatile memory modules age, the preset read voltage levels shift relative to the threshold voltage distribution, leading to increased bit error rates and reduced service life in memory storage devices.

Innovation Solution

A read voltage calibration method that involves reading data using multiple voltage levels, decoding error evaluation parameters, determining a vector distance parameter, and adjusting the read voltage levels to find a target voltage level for re-reading, thereby improving calibration efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple preset read voltage levels are used to read data from memory cells, then data can be read from the memory storage device, but after the memory cell wears out, the preset read voltage levels shift relative to the threshold voltage distribution, increasing the bit error rate

Engineering Contradiction:
Improvebit error rateVSAvoidservice life
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The patent dynamically adjusts read voltage levels based on wear indicators and error evaluation parameters. Instead of using fixed preset voltage levels, the system modifies voltage parameters in response to memory cell degradation, thereby maintaining reliable data reading throughout the device's service life and reducing bit error rates even as the memory ages.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If traditional error evaluation methods are used to determine read voltage calibration, then the calibration process can be completed, but the calibration efficiency is low and time-consuming

Engineering Contradiction:
Improvecalibration precisionVSAvoidcalibration time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent performs preliminary error evaluation by reading data with multiple voltage levels and calculating error parameters before final calibration. This preliminary assessment identifies the most promising voltage levels and calibration directions, allowing the system to focus subsequent calibration efforts on the most critical adjustments, thereby reducing overall calibration time while maintaining precision.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements a feedback mechanism where error evaluation parameters from initial reads are used to guide voltage level adjustments. The calibrated voltage levels are then validated by re-reading data and evaluating errors again, creating a closed-loop calibration process that efficiently converges on optimal voltage settings with minimal iterations.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12112808B2Read voltage calibration method, memory storage device, and memory control circuit unit
Publication Date: 2024.10.08 PHISON ELECTRONICS
  • US12112808B2 patent drawing
  • US12112808B2 patent drawing
  • US12112808B2 patent drawing

AI summary

A read voltage calibration method, a memory storage device, and a memory control circuit unit are provided. The read voltage calibration method includes: reading data from a first physical unit by using multiple read voltage levels; decoding the data to obtain multiple error evaluation parameters; determining a first vector distance parameter according to a first error evaluation parameter; determining multiple candidate read voltage levels according to the first vector distance parameter and a first read voltage level; determining a target read voltage level according to one of the candidate read voltage levels; and reading the data again from the first physical unit by using the target read voltage level.