Iterative Read Voltage Calibration Using Shift Pattern Detection
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Solution Overview
Problem
Conventional memory systems face challenges in accurately calibrating read voltages for memory cells due to shifts caused by factors like charge loss, transient voltage threshold, and read disturb, leading to poor precision in identifying optimized read voltages.
Innovation Solution
A memory sub-system with a calibration manager that detects patterns in shifts of optimized read voltages during initial calibration and uses this information to control subsequent calibration iterations, adjusting read voltages to mitigate the effects of charge loss, transient voltage threshold, and read disturb.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional calibration methods are used to determine read voltages, then the calibration process is simple and fast, but the precision of identifying optimized read voltages is poor due to shifts caused by charge loss, transient voltage threshold, and read disturb
Solution Approach 1:
The patent implements an iterative calibration process where the calibration manager performs multiple calibration iterations, each time using the results from the previous iteration to adjust and refine the read voltage determination. The system monitors shifts in optimized read voltages between iterations and uses this feedback to control subsequent calibration iterations, progressively improving measurement precision while managing complexity through structured repetition.
Solution Approach 2:
The calibration process transitions from a static, single-pass conventional method to a dynamic, adaptive iterative process. The calibration manager dynamically adjusts calibration parameters and controls the progression of calibration iterations based on detected patterns in voltage shifts, allowing the system to adapt to changing conditions and improve precision over time.
2Measurement precision
If iterative calibration is performed to improve read voltage accuracy, then the precision improves, but the calibration time and complexity increase
Solution Approach 1:
The calibration manager performs calibration iterations until a predetermined number is reached or until convergence is achieved, rather than performing an excessive number of iterations. This partial action approach ensures sufficient precision is achieved while avoiding unnecessary time consumption from redundant iterations, balancing accuracy requirements with time efficiency.
Solution Approach 2:
The iterative calibration process uses periodic calibration iterations spaced at appropriate intervals, allowing the system to refine read voltage accuracy through structured repeated measurements. The calibration manager controls the timing and frequency of iterations to achieve necessary precision without continuous calibration overhead.
3Reliability
If the calibration process accounts for charge loss, transient voltage threshold, and read disturb effects, then the reliability of data retrieval improves, but the complexity of the calibration process increases
Solution Approach 1:
The calibration manager uses feedback from monitoring voltage shifts between calibration iterations to detect patterns caused by charge loss, transient voltage threshold, and read disturb effects. By analyzing these patterns and adjusting subsequent calibration iterations accordingly, the system compensates for these harmful effects and improves data retrieval reliability without requiring separate complex mitigation procedures for each effect.
Solution Approach 2:
The patent converts the harmful effects of charge loss, transient voltage threshold shifts, and read disturb into useful information by monitoring the patterns of voltage shifts they cause. The calibration manager uses these shift patterns to control and adjust subsequent calibration iterations, turning the previously problematic effects into a basis for improving calibration accuracy and reliability.
Data Source
AI summary
A memory sub-system configured to use first values of a plurality of optimized read voltages to perform a first read calibration, which determines second values of the plurality of optimized read voltages. A plurality of shifts, from the first values to the second values respectively, can be computed for the plurality of optimized read voltages respectively. After recognizing a pattern in the plurality of shifts that are computed for the plurality of voltages respectively, the memory sub-system can control and/or initiate a second read calibration based on the recognized pattern in the shifts.