Read Voltage Offset for Partially Programmed Memory Blocks
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Solution Overview
Problem
Memory devices experience a back-pattern effect during read operations on partially programmed blocks, leading to a high read trigger rate due to the perceived threshold voltage being sensed at lower values, which cannot be effectively compensated for by existing calibration techniques.
Innovation Solution
The implementation of a read voltage level compensation method that offsets the voltage used during read operations based on the ratio of programmed wordlines in a block, using a metadata structure to map metric values to corresponding read voltage offsets, thereby compensating for the back-pattern effect.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing calibration techniques are used for read operations on partially programmed blocks, then the read operation can be performed, but the read trigger rate remains high due to the back-pattern effect causing perceived threshold voltage to be sensed at lower values
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the read voltage level based on the number of programmed wordlines in a block. Instead of using a fixed read voltage, the system modifies the voltage parameter to compensate for the back-pattern effect, which causes threshold voltage to be sensed at lower values in partially programmed blocks. This voltage adjustment directly addresses the measurement precision issue while improving reliability by reducing the read trigger rate.
2Measurement precision
If read voltage level compensation is applied to compensate for the back-pattern effect, then the threshold voltage sensing accuracy is improved, but the device complexity increases due to the need for metadata structures and voltage offset management
Solution Approach 1:
The patent implements preliminary action by pre-calculating and storing voltage offset values in a metadata structure before actual read operations. The system prepares compensation data in advance based on the number of programmed wordlines, so that during read operations, the pre-computed offsets can be directly applied without real-time complex calculations. This approach improves measurement precision while managing device complexity by shifting the computational burden to a preliminary setup phase.
3Reliability
If the read voltage offset is adjusted based on the ratio of programmed wordlines, then the read trigger rate is reduced and QoS is improved, but the time required to determine and apply the appropriate voltage offset increases
Solution Approach 1:
The patent applies preliminary action by pre-computing and storing voltage offset values in a metadata structure during programming operations or idle periods. When a read operation is initiated, the system simply retrieves the pre-determined voltage offset corresponding to the current block's programmed wordline ratio, rather than calculating it in real-time. This significantly reduces the time loss during read operations while maintaining the reliability improvement of reduced read trigger rates.
Solution Approach 2:
The patent replaces the mechanical calculation process with a lookup operation. Instead of performing complex real-time calculations to determine voltage offsets based on programmed wordline ratios, the system substitutes this with a simple table lookup in the metadata structure. This substitution dramatically reduces the time required for voltage offset determination while maintaining accuracy in reducing read trigger rates.
Data Source
AI summary
A system includes a memory device and a processing device, operatively coupled with the memory device, to perform operations, including: determining a read voltage offset corresponding to a value of a metric reflective of a programmed state of a set of memory cells of the memory device; and performing, using the read voltage offset, a memory access operation with respect to the set of memory cells.