Read Voltage Update for Non-Volatile Memory Error Correction
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Solution Overview
Problem
Non-volatile memory devices face errors due to variations in sensed programming states from written states, particularly due to data retention and program disturb conditions, which existing technologies fail to address effectively in terms of error correction and latency.
Innovation Solution
Updating read voltages by reading a single bit from each storage element in a memory portion, rather than concurrently updating read thresholds for all pages, allows for improved error correction and reduced latency by generating updated read voltages based on hard and soft bit data using curve fitting operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If read thresholds of all pages are updated concurrently, then error correction capability is improved, but latency increases
Solution Approach 1:
The patent segments the read threshold update process by page instead of updating all pages concurrently. The controller updates read thresholds for one page at a time, allowing other pages to be accessed in the meantime. This segmentation reduces the time penalty by enabling overlapping operations between threshold updates and page accesses, thereby maintaining error correction capability while reducing overall latency.
2Reliability
If read thresholds are updated for all pages, then data reliability is improved, but processing efficiency decreases
Solution Approach 1:
The patent divides the memory into multiple pages and updates read thresholds for only the currently accessed page rather than all pages. This segmentation allows the system to maintain data reliability for accessed pages while improving processing efficiency by avoiding unnecessary updates to other pages, thus reducing the overall update time and enhancing productivity.
Solution Approach 2:
The patent applies partial action by updating read thresholds for only the necessary page being accessed rather than performing a complete update across all pages. This partial update approach maintains sufficient data reliability for the accessed data while significantly improving processing efficiency by reducing the scope of the update operation.
3Quantity of substance
If multiple bits are stored per storage element, then storage density is increased, but error correction difficulty increases
Solution Approach 1:
The patent applies local quality by implementing page-specific read threshold updates rather than global updates. Each page can have its own optimized thresholds tailored to its specific error characteristics and access patterns. This localized approach enables effective error correction for multi-bit storage elements by adapting thresholds to local conditions, thereby managing error correction complexity while maintaining high storage density.
Data Source
AI summary
A method includes receiving hard bit data and soft bit data corresponding to a portion of a memory, where each storage element of the memory stores multiple bits per storage element. The hard bit data and the soft bit data is received in connection with reading a single bit of the multiple bits from each storage element in the portion of the memory based on one or more first read voltages. One or more second read voltages based on the hard bit data and the soft bit data are generated in response to a read voltage update operation. The memory reads data from the portion of the memory using the one or more second read voltages.