Read-with-overridable-invalidate transaction for cache coherency
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Solution Overview
Problem
Current data processing systems face inefficiencies in cache management due to the lack of a mechanism to optionally invalidate data, leading to suboptimal cache usage and performance, especially in scenarios where data is unlikely to be reused.
Innovation Solution
The introduction of a 'read-with-overridable-invalidate' transaction that allows a requesting master device to signal the potential invalidation of target data from a cache, with the interconnect and cache having the discretion to override this hint based on coherency protocols and access patterns, thereby managing cache entries more efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a read transaction triggers invalidation of target data from cache, then cache coherency is maintained, but cache usage efficiency deteriorates due to unnecessary evictions
Solution Approach 1:
The patent introduces a new transaction type (read-with-overridable-invalidate) that changes the parameter of invalidation from mandatory to optional. This allows the system to dynamically adjust the invalidation behavior based on whether the data is likely to be reused, thereby maintaining coherency when necessary while avoiding unnecessary evictions when not required.
Solution Approach 2:
The patent makes the invalidation process dynamic by allowing the cache to override the invalidation request under certain conditions. Instead of a static mandatory invalidation, the system now adapts its behavior based on runtime conditions such as data reuse likelihood, improving cache efficiency while maintaining coherency guarantees when needed.
2Reliability
If cache data is invalidated to ensure coherency, then data consistency is maintained, but write traffic increases due to repeated cache misses
Solution Approach 1:
By changing the invalidation parameter from mandatory to optional, the system can avoid unnecessary cache evictions that would otherwise cause cache misses and subsequent write traffic to memory. This reduces energy loss while maintaining data consistency through selective invalidation.
Solution Approach 2:
The patent converts the potential harm of premature invalidation into a benefit by allowing the cache to override invalidation requests when data is likely to be reused. This transforms what would be a harmful eviction into a beneficial retention, reducing write traffic while maintaining consistency.
3Reliability
If mandatory invalidation is used upon read, then cache coherency is ensured, but cache allocation efficiency deteriorates
Solution Approach 1:
The patent changes the invalidation parameter to be overridable, allowing the cache allocation process to consider data reuse patterns. This improves cache allocation efficiency by retaining useful data while still ensuring coherency when required, without adding significant complexity to the allocation mechanism.
Data Source
AI summary
A system comprises a number of master devices and an interconnect for managing coherency between the master devices. In response to a read-with-overridable-invalidate transaction received by the interconnect from a requesting master device requesting that target data associated with a target address is provided to the requesting master device, when target data associated with the target address is stored by a cache, the interconnect issues a snoop request to said cache triggering invalidation of the target data from the cache except when the interconnect or cache determines to override the invalidation and retain the target data in the cache. This enables greater efficiency in cache usage since data which the requesting master considers is unlikely to be needed again can be invalidated from caches located outside the master device itself.