High Resistance Readout FET for Cognitive Circuits
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Solution Overview
Problem
Cognitive device circuits, such as neural networks, require lower current specifications to operate properly, which is not met by typical high current transistor devices, necessitating the development of transistors with low current and high resistance properties.
Innovation Solution
The fabrication of semiconductor devices with low mobility and high resistance field effect transistors (FETs) is achieved by forming a doped cladding layer on the channel region, incorporating a scattering center to reduce carrier mobility, and using a gate dielectric structure, which allows for the creation of low current transistors suitable for cognitive device circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If typical high current transistor devices are used, then signal delay is reduced, but current consumption is too high for cognitive device circuits
Solution Approach 1:
The patent applies local quality by creating different transistor types within the same cognitive device circuit. High current transistors are used for write operations where speed is critical, while low current transistors are used for readout operations where low power consumption is critical. This is achieved through selective transistor design and placement in different circuit regions.
Solution Approach 2:
The patent changes transistor parameters (channel width, length, doping concentration, mobility) to create low current transistors specifically for readout operations. By adjusting these parameters, the transistor current is reduced to meet the low power requirements of cognitive device circuits while maintaining sufficient signal delay performance.
2Loss of time
If higher current transistor devices are used to reduce signal delay, then typical transistor operation is improved, but the transistors are not suitable for cognitive device circuits requiring lower current
Solution Approach 1:
The patent segments the transistor population into different types based on their functional requirements. High current transistors are used for write operations where speed is critical, while low current transistors are used for readout operations where low power consumption is critical. This segmentation allows each transistor type to be optimized for its specific function.
Solution Approach 2:
The patent creates dynamically adaptable circuits by using different transistor types in different operational modes. The circuit can switch between high current mode for writing and low current mode for reading, allowing the system to adapt its current consumption characteristics to the operational requirements.
Data Source
AI summary
A semiconductor device includes a source region and a drain region formed in a transistor structure. A channel region is disposed between the source region and the drain region. A cladding layer is formed on the channel region, the cladding layer including a semiconductor material. A gate dielectric of a gate structure is formed on the cladding layer.