Rear-Side Power Via Layout for Scaled MOSFET Power Delivery
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Solution Overview
Problem
As semiconductor devices are scaled down, their operation characteristics deteriorate, necessitating improved performance and design efficiency.
Innovation Solution
The semiconductor device incorporates a power distribution network layer, gate electrode, source/drain patterns, through via structures, and rear surface power rails to enhance power transmission and reduce power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If metal-oxide-semiconductor field effect transistors are scaled down to improve integration, then device density increases, but operation characteristics deteriorate
Solution Approach 1:
The patent introduces rear surface power via structures that extend from the front surface through the substrate to the rear surface, utilizing the vertical dimension to establish power distribution pathways. This three-dimensional approach allows power delivery without occupying additional planar space, enabling continued scaling while maintaining power supply integrity and device operation characteristics.
Solution Approach 2:
The through-substrate power via structures act as intermediary elements that bridge the power distribution network between the front surface circuitry and the rear surface substrate contact. These intermediary pathways enable power transmission through the substrate without interfering with the scaled-down transistor dimensions and layout on the front surface.
2Power
If power distribution network is enhanced to improve power transmission, then power delivery capability increases, but device complexity increases
Solution Approach 1:
The rear surface substrate serves multiple functions: it provides mechanical support, acts as a heat sink, and now also serves as a pathway for power distribution through the through-substrate via structures. By utilizing the existing rear surface for power delivery, the patent avoids adding separate dedicated power distribution layers or components that would increase device complexity.
Solution Approach 2:
The patent moves power distribution from a primarily planar configuration to a three-dimensional configuration by routing power via structures through the substrate thickness. This vertical power delivery approach eliminates the need for extensive lateral power network routing, reducing the complexity of the power distribution system while enhancing power transmission capability.
Data Source
AI summary
Provided is a semiconductor device including a power distribution network layer on a lower surface of a substrate, a gate electrode on the substrate, a first source/drain pattern and a second source/drain pattern on the substrate, the first and second source/drain patterns each including a first pattern and a second pattern spaced apart from each other with the gate electrode therebetween, a through via structure penetrating the substrate and extending along a direction perpendicular to an upper surface of the substrate, the through via structure connecting the power distribution network layer and the first pattern of the first source/drain pattern, and a rear surface power via extending from below the second pattern of the first source/drain pattern to below the second pattern of the second source/drain pattern.