Rear-Side Contacted Optoelectronic Semiconductor Chips
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Solution Overview
Problem
Light-emitting diode semiconductor chips face challenges in achieving compact designs due to wire bonding connections, which also increase the risk of failure.
Innovation Solution
A method for fabricating optoelectronic semiconductor chips involves depositing a semiconductor layer sequence on a growth substrate, fixing it to a carrier using a connecting layer, and forming recesses through the carrier and active region into the first semiconductor layer to enable electrical contact from the rear side, eliminating the need for external contacts on the radiation exit surface and allowing for compact configurations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wire bonding connection is used for electrical contact on the front side, then electrical connection can be established, but the housing becomes less compact and the risk of failure increases
Solution Approach 1:
The patent inverts the conventional wire bonding approach by creating recesses that extend from the rear side of the carrier through the active region into the first semiconductor layer. This allows electrical contacts to be made from the rear side instead of the front side, eliminating the need for wire bonding and enabling a more compact housing configuration while reducing failure risk
2Device complexity
If recesses are formed to enable rear-side electrical contact, then housing compactness is improved and wire bonding is eliminated, but additional manufacturing steps are required
Solution Approach 1:
The recesses are formed before the semiconductor layer sequence is fixed to the carrier. This preliminary action allows the recesses to be created while the semiconductor layers are still accessible and easier to work with, facilitating subsequent electrical contact formation and simplifying the overall manufacturing process despite the additional step
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method allows for the production of optoelectronic semiconductor chips with high efficiency and compact designs, reducing the risk of failure and fabrication costs while enabling efficient electrical contact and radiation management.
Implementation Method 1
a semiconductor layer sequence having an active region provided for generating and/or receiving radiation, said active region being arranged between a first semiconductor layer and a second semiconductor layer, is deposited on a growth substrate
Implementation Method 2
the recesses are formed by an anisotropic etching process. Deep reactive ion etching (DRIE) is suitable, in particular
Data Source
AI summary
A method for fabricating optoelectronic semiconductor chips and optoelectronic semiconductor chips are disclosed. In embodiments the method comprises depositing a semiconductor layer sequence having an active, the active region being arranged between a first semiconductor layer and a second semiconductor layer on a growth substrate, attaching the semiconductor layer sequence to a carrier and forming a plurality of recesses extending through the carrier, the second semiconductor layer and the active region into the first semiconductor layer. The method further comprises forming first contacts on a first main surface of the carrier, the first main surface facing away from the semiconductor layer sequence, wherein the first contacts are electrically conductively connected to the first semiconductor layer in the region of the recesses and singulating the carrier and the semiconductor layer sequence into the plurality of optoelectronic semiconductor chips, wherein each semiconductor chip has at least one recess.