REC-RE Synchronization Over Asynchronous Ethernet Links

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Solution Overview

Problem

Existing radio network technologies face challenges in maintaining precise synchronization over asynchronous communication links, such as Ethernet, which are prone to variable queuing delays and packet reordering, making them unsuitable for deterministic timing required by CPRI-based synchronization between Radio Equipment Controllers (RECs) and Radio Equipment (REs).

Innovation Solution

The implementation of adaptors at both the REC and RE sides that exchange CPRI timing information over asynchronous links, using a synchronization packet flow separate from data flows, dynamically adapting buffer residency times to compensate for variable transport delays, effectively masking latency variability and maintaining a fixed transport delay, allowing synchronous CPRI-compliant interfaces to operate over asynchronous links like Ethernet.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If asynchronous communication links (e.g., Ethernet) are used for REC/RE synchronization, then cost and ease of deployment are improved, but timing precision and determinism deteriorate due to variable queuing delays and packet reordering

Engineering Contradiction:
Improveease of deploymentVSAvoidtiming precision
Core Design Contradiction:
Ease of manufactureVSMeasurement precision

Solution Approach 1:

The patent segments the data transmission into separate synchronization packet flows and user data packet flows. The synchronization flow carries timing-critical CPRI data with guaranteed delivery, while the user plane handles best-effort data. This segmentation allows asynchronous Ethernet to carry synchronous CPRI requirements by isolating timing-sensitive traffic from variable-delay user traffic.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary synchronization mechanism that mediates between the asynchronous Ethernet link and the synchronous CPRI requirement. The synchronization packet flow acts as a mediator, carrying timing information and control data that enables the RE to reconstruct synchronous timing despite the asynchronous nature of the underlying Ethernet transport.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If dedicated synchronous links are used for REC/RE interface, then timing synchronization is improved, but cost and complexity increase

Engineering Contradiction:
Improvesynchronization accuracyVSAvoidlink complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent makes the Ethernet link universal by enabling it to carry both synchronous CPRI synchronization data and asynchronous user plane data over the same physical infrastructure. The adaptors at REC and RE ends provide multi-functionality, handling both synchronization packet flows and user data packet flows, thereby eliminating the need for separate dedicated synchronous links.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent creates a virtual synchronous link over the asynchronous Ethernet by copying the CPRI protocol behavior at the adaptors. The synchronization packet flow replicates the timing and control functions of a dedicated synchronous link, allowing CPRI-compliant interfaces to operate transparently over Ethernet without physical synchronous connectivity.

Inventive Principle:
Principle #26Copying

3Adaptability or versatility

If packet-based asynchronous transport is used, then flexibility and routing options are improved, but delivery reliability and order preservation deteriorate

Engineering Contradiction:
Improverouting flexibilityVSAvoidpacket delivery reliability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent applies preliminary action by pre-establishing synchronization packet flows with guaranteed delivery mechanisms before user data transmission. The synchronization packets carry timing information and control data that must be delivered reliably and in order, so the system prepares for this by using QoS mechanisms, sequence numbering, and retransmission protocols specifically for the synchronization plane.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback mechanisms in the synchronization packet flow, where the RE acknowledges receipt of synchronization packets and the REC can request retransmission of lost or out-of-order packets. This feedback loop ensures reliable delivery of timing-critical data over the best-effort asynchronous Ethernet link.

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP2769596B8Methods and apparatuses for maintaining synchronization between a radio equipment controller and an item of radio equipment
Publication Date: 2016.05.18 TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)

AI summary

The present invention comprises methods and apparatuses for maintaining radio network timing synchronization across an asynchronous communication link (26) between a Radio Equipment Controller (REC) (12) and an item of Radio Equipment (RE) (14). An REC- side adaptor (30) sends first and second asynchronous packet flows over the asynchronous communication link (26), including a downlink packet flow comprising CPRI basic frames (34) and overhead information encapsulated in asynchronous communication link packets, and a synchronization packet flow comprising CPRI clock data. An RE-side adaptor (32) recovers the CPRI clock from the synchronization packet flow, and uses the recovered clock to re- synchronize the downlink data (14) recovered from the downlink packet flow. For the uplink, the RE (16) outputs uplink traffic in a synchronous, CPRI-compliant stream that is then encapsulated for asynchronous transport by the RE-side adaptor (32). The REC-side adaptor (30) reconstitutes the asynchronously received uplink data as a synchronous, CPRI-compliant stream for input to the REC (12).