Receive Data Equalization Circuit for Inter-Symbol Interference
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Solution Overview
Problem
Existing communication systems face high hardware costs and reduced speed due to complex designs in common equalization technologies, which fail to effectively lower signal transmission error rates caused by interference such as multi-path interference and shadow effects.
Innovation Solution
A received data equalization apparatus and method that includes a delay-compensating calculation circuit and a receive data equalization circuit, which calculate compensation amounts and total compensation amounts based on training data to perform equalization, thereby calibrating inter-symbol interference with ease of convergence and short convergence time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If common equalization technologies are used, then signal transmission error rate is reduced, but hardware cost increases and system speed is affected
Solution Approach 1:
The patent segments the equalization process into two distinct stages: a training stage using known training data to calculate compensation amounts, and a reception stage using those compensation amounts to equalize actual received data. This segmentation allows the complex equalization task to be broken down into manageable parts, reducing overall system complexity while maintaining effectiveness.
Solution Approach 2:
The patent performs preliminary equalization calculations during a training stage before actual data reception. Compensation amounts are pre-calculated based on training data groups and channel characteristics, then stored for use during actual reception. This preliminary action eliminates the need for complex real-time calculations during data transmission, simplifying the reception circuit design.
2Reliability
If common equalization technologies are used, then signal transmission error rate is reduced, but system speed decreases
Solution Approach 1:
The patent performs preliminary equalization calculations during a training stage before actual data reception. Compensation amounts are pre-calculated based on training data groups and channel characteristics, then stored for use during actual reception. This preliminary action eliminates the need for complex real-time calculations during data transmission, simplifying the reception circuit design.
Solution Approach 2:
The patent uses training data groups that are identical copies or representations of the actual data structure, allowing the system to practice equalization calculations on copy data before processing real data. This copying approach enables the system to pre-determine compensation amounts without affecting the speed of actual data transmission.
3Reliability
If decision feedback equalization mechanism is used, then channel response compensation is achieved, but hardware cost increases
Solution Approach 1:
The patent extracts and isolates the complex calculation operations to a dedicated delay-compensating calculation circuit that operates separately from the main reception path. By taking out the computational complexity into a specialized training-stage module, the main reception circuit can use simpler, more cost-effective hardware while still achieving the same channel response compensation.
Solution Approach 2:
The patent changes the operational parameters of the equalization system by introducing compensation amounts calculated during training, rather than performing continuous complex calculations during reception. This parameter change from real-time computation to pre-calculated compensation values reduces hardware requirements and manufacturing costs.
Data Source
AI summary
The present invention discloses a receive data equalization apparatus. A delay-compensating calculation circuit retrieves training data groups of a training data signal to retrieve total delay amount, generate signed compensation amounts according to a relation among training data contents of training data in each of the training data groups to generate total compensation amount accordingly, and solve equations that correspond total delay amount of the training data groups to the total compensation amount to obtain each of the compensation amounts. A receive data equalization circuit receives the compensation amounts and retrieves a receive data group in a receive data signal, generate signed receive compensation amounts according to a relation among receive data contents of receive data in the receive data group to generate a total receive compensation amount accordingly to perform equalization on a terminal edge of the receive data group according to the total receive compensation amount.