Selectable Receiver Amplifier Circuit for Multi-Standard DDR Signals
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Solution Overview
Problem
Receiver circuits face challenges in accommodating different transmission formats due to varying signal characteristics, such as voltage levels, which require distinct configurations for P-type and N-type transistors across different communication standards.
Innovation Solution
A receiver circuit design incorporating a first and second amplifier circuit, a selector circuit, and optional level shifter and latch circuits, utilizing P-type and N-type transistors respectively, and controlled by a selection signal to generate and output appropriate amplifying signals, enabling compatibility with multiple transmission formats like LPDDR4, LPDDR2, LPDDR3, DDR3, and DDR4.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate receiver circuits are designed for different transmission formats, then compatibility with various standards is improved, but device complexity increases
Solution Approach 1:
The receiver circuit is designed with a universal architecture that can handle multiple transmission formats (LPDDR4, LPDDR2, LPDDR3, DDR3, DDR4) through a single circuit implementation. The circuit uses configurable amplifier stages and level shifters that can be dynamically adjusted via control signals to match different transmission format requirements, eliminating the need for separate dedicated receiver circuits for each standard.
Solution Approach 2:
The receiver circuit employs dynamic configuration mechanisms where amplifier enable signals and level shifter control signals can be adjusted in real-time based on the detected transmission format. This allows the circuit to adapt its characteristics (such as gain, voltage levels, and signal conditioning) dynamically to match the specific requirements of different memory standards without requiring multiple fixed circuits.
2Measurement precision
If receiver circuits are customized for specific transmission formats, then signal processing precision is improved, but adaptability to other formats deteriorates
Solution Approach 1:
The receiver circuit implements local quality by providing different signal processing characteristics for different stages and paths within the circuit. Specifically, the first and second amplifier circuits can be independently enabled or disabled based on the transmission format, allowing optimal signal processing for each format while maintaining a unified circuit structure. The level shifter circuits also provide localized voltage level adaptation specific to each format's requirements.
Solution Approach 2:
The circuit achieves format-specific precision through parameter changes controlled by selection signals. By adjusting which amplifier circuits are active and how level shifters are configured, the circuit can optimize parameters such as gain, voltage levels, and signal conditioning for each specific transmission format, thereby maintaining high signal processing precision across different standards without requiring separate customized circuits.
3Adaptability or versatility
If multiple amplifier circuits are used to support different formats, then adaptability is improved, but circuit complexity increases
Solution Approach 1:
The receiver circuit merges multiple amplifier circuits (first and second amplifier circuits) into a single integrated structure that can operate in different configurations. Instead of using completely separate receiver circuits for different formats, the patent combines multiple amplifier stages that can be selectively enabled or disabled based on the transmission format, reducing overall circuit complexity while maintaining format support capability.
Solution Approach 2:
The amplifier section is segmented into multiple independent amplifier circuits (first and second amplifier circuits) that can be selectively activated. This segmentation allows the circuit to process different transmission formats through appropriate amplifier combinations while maintaining a unified overall structure. The control logic selectively enables specific amplifier segments based on the detected format, optimizing performance without requiring all amplifiers to be permanently active.
Data Source
AI summary
A receiver circuit includes a first amplifier circuit, a second amplifier circuit, and a selector circuit. The first amplifier circuit is configured to receive a pair of receiving signals. The second amplifier circuit is configured to receive the pair of receiving signals. Based on a selection signal, the first amplifier circuit generates a pair of first amplifying signals according to the pair of receiving signals or the second amplifier circuit generates a pair of second amplifying signals according to the pair of receiving signals. The selector circuit is configured to output the pair of first amplifying signals or the pair of second amplifying signals according to the selection signal.