Direct-Conversion Receiver Baseband DC Offset Compensation

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Solution Overview

Problem

Direct conversion receivers face challenges with DC offset and flicker noise, particularly in WCDMA systems, where existing methods either degrade signal quality or fail to effectively eliminate dynamic DC offsets, leading to distortions and decoding errors.

Innovation Solution

A method involving a main amplifier with DC offset compensation using an auxiliary frequency transposition stage and Miller integrator, where the auxiliary amplifier's output is filtered or fed back to compensate for DC offset, allowing continuous reduction of DC components without degrading signal quality at 0 Hz.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If a capacitive high-pass filter is placed in the receiver channel to cut off DC signal, then DC offset is reduced, but signal quality at low frequencies is degraded and tuning speed is slow

Engineering Contradiction:

ImproveDC offsetVSAvoidsignal quality

Core Design Contradiction:

Object-affected harmful factorsVSReliability

Solution Approach 1:

The patent segments the DC offset compensation into two independent parts: static DC offset compensation and dynamic DC offset compensation. This is achieved by dividing the compensation signal generation into separate processing paths - one handling static components and another handling dynamic components, allowing each to be optimized independently without compromising signal quality

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent applies preliminary action by compensating for static DC offset before dynamic DC offset. The static compensation is performed first using stored calibration data, establishing a baseline correction that prevents subsequent degradation of low-frequency signal quality during dynamic compensation operations

Inventive Principle:

Principle #10Preliminary action

2Object-affected harmful factors

If negative feedback loop is created in RF channel to filter DC offset, then DC offset is reduced, but system complexity increases and tuning speed decreases

Engineering Contradiction:

ImproveDC offsetVSAvoidsystem complexity

Core Design Contradiction:

Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent extracts DC offset compensation from the main signal processing path and implements it separately through dedicated compensation circuits. The static and dynamic compensation signals are generated independently and injected into the signal path, avoiding the need for complex feedback loops that would increase system complexity and reduce tuning speed

Inventive Principle:

Principle #2Taking out (Extraction)

3Object-affected harmful factors

If master-slave architecture is used to extract and eliminate DC offset in real-time, then dynamic DC offset is reduced, but power consumption increases and only static offsets are eliminated

Engineering Contradiction:

Improvedynamic DC offsetVSAvoidpower consumption

Core Design Contradiction:

Object-affected harmful factorsVSUse of energy by moving object

Solution Approach 1:

The patent merges static and dynamic DC offset compensation into a unified compensation mechanism. By combining the static compensation path and dynamic compensation path into a single integrated system that shares common resources and processing elements, the patent achieves comprehensive DC offset elimination while minimizing power consumption compared to separate master-slave architectures

Inventive Principle:

Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces both static and dynamic DC offsets, maintaining signal quality and power at 0 Hz, while partially reducing flicker noise, suitable for 'full duplex' systems like WCDMA.

Implementation Method 1

auxiliary compensation means or auxiliary compensator for compensating the DC offset of the auxiliary amplifier, here comprising a Miller integrator

Methodology Applied

Scientific EffectMiller integrator:

Implementation Method 2

generation means or generator for generating a main compensation signal from the output signal of the auxiliary amplifier and for delivering it to the compensation input of the main amplifier, here comprising a low-pass filter

Methodology Applied

Scientific EffectLow-pass filter: Filter (electronic)

Data Source

PatentUS7787853B2Method and device for the reduction of the DC component of a signal transposed into baseband, in particular in a receiver of the direct conversion type

Publication Date: 2010.08.31 STMICROELECTRONICS FRANCE

AI summary

A method is for reducing a DC component of an input signal transposed into baseband and being generated by a first frequency transposition stage starting from an initial signal and from a transposition signal. The method includes amplifying the transposed input signal in a first amplifier. The first amplifier receives at a DC offset compensation input, a compensation signal extracted from an output signal of a second amplifier subjected to a compensation of a offset DC voltage of the second amplifier. The method also included alternating between receiving at an input of the second amplifier, a first auxiliary signal from an auto-transposition of a transposition signal in a second frequency transposition stage and a second auxiliary signal from a transposition of the initial signal in the second frequency transposition stage with the transposition signal.