Multi-Stage Receiver Buffer for Duty Cycle Signal Correction

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Solution Overview

Problem

In electronic systems where a master device controls a slave device, variations in process and voltage can cause errors in signal transmission between the devices, leading to instability in the amplification of control signals and data.

Innovation Solution

A receiver with multiple stage buffers and a duty cycle adjustment portion is used to amplify and correct output signals, minimizing impedance variations and maintaining duty cycles within an allowable range by providing correction currents through load portions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single stage buffer is used to amplify the input signal, then the device complexity is low, but the output signal may fall outside the allowable range due to process and voltage variations

Engineering Contradiction:
Improveoutput signal stabilityVSAvoidbuffer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The amplification process is divided into multiple stages: a first stage buffer for initial amplification, a duty cycle adjustment portion for correcting duty cycle variations, and a second stage buffer for final amplification. This segmentation allows each stage to perform a specific function, ensuring the output signal remains within the allowable range while maintaining signal integrity despite process and voltage variations.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the duty cycle is not adjusted, then the device complexity is low, but impedance variations cause errors in signal transmission

Engineering Contradiction:
Improvesignal transmission accuracyVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The duty cycle adjustment portion functions as a feedback mechanism that monitors the duty cycle of the signal from the first stage buffer and provides correction currents to adjust the duty cycle before the signal enters the second stage buffer. This feedback loop compensates for impedance variations and process/voltage effects, ensuring accurate signal transmission without requiring complex external correction circuits.

Inventive Principle:
Principle #23Feedback

3Reliability

If multiple stage buffers are added to ensure output signal stability, then the reliability improves, but the device complexity increases

Engineering Contradiction:
Improveoutput signal range controlVSAvoidbuffer stages
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The duty cycle adjustment portion serves as an intermediary element between the first stage buffer and the second stage buffer. It receives the output from the first stage buffer, adjusts the duty cycle by providing correction currents, and delivers the corrected signal to the second stage buffer. This intermediary function ensures that the second stage buffer receives a signal with the correct duty cycle, preventing output signal instability without requiring excessive buffering stages.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9438190B1Amplification circuit adjusting duty cycle of output signal and receiver including the same
Publication Date: 2016.09.06 SK HYNIX INC
  • US9438190B1 patent drawing
  • US9438190B1 patent drawing
  • US9438190B1 patent drawing

AI summary

A receiver includes a first stage buffer, a second stage buffer and a third stage buffer. The first stage buffer includes an input portion electrically coupled to a first voltage node, and configured to change a voltage level of an output node in response to an input signal, first and second load portions electrically coupled between a second voltage node and the output node, and electrically coupled to each other and a duty cycle adjustment portion electrically coupled between the first and second load portions, and configured to provide a correction current to the output node through the first load portion.