Receiver Nonlinearity Calibration With Replica Memory Swapping

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Solution Overview

Problem

Nonlinearities in signal chains, such as harmonic distortion and intermodulation distortion, compromise the integrity and accuracy of signals in high-precision applications, necessitating improved techniques for distortion correction.

Innovation Solution

A system that stores concatenated distortion correction terms in a smaller number of replica memories, allowing for efficient data handling and processing, and includes a dither system using two memories to produce a noise-corrected digital output, while minimizing hardware resources and enhancing system efficiency through a rolling update process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multiple primary memories are used to store distortion correction terms, then the accuracy and completeness of distortion correction is improved, but the hardware complexity and resource consumption increase

Engineering Contradiction:
Improvedistortion correction accuracyVSAvoidhardware complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent uses replica memories as copies of primary memories to store the same distortion correction terms. These replica memories can be updated independently and then swapped with primary memories, allowing accurate distortion correction to be maintained while reducing the need for multiple large primary memories simultaneously.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent performs preliminary updates to replica memories before they are needed for distortion correction. The replica memories are prepared in advance with updated distortion terms, so when switching is needed, the transition can occur without interrupting the distortion correction function.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If distortion correction terms are updated frequently, then the accuracy of distortion correction is improved, but the system operation may be interrupted

Engineering Contradiction:
Improvedistortion correction accuracyVSAvoidsystem continuity
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent maintains replica memories as standby copies that can be updated independently of the primary memories in use. When updates are complete in the replica memories, they can be swapped with the primary memories without interrupting the distortion correction operation, ensuring system continuity while maintaining up-to-date correction terms.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent performs updates to replica memories in advance before they are needed for active distortion correction. This preliminary updating ensures that when the swap occurs, the system transitions to already-prepared correction terms without interruption.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If more memories are used for distortion correction, then the correction precision is improved, but the data handling efficiency decreases

Engineering Contradiction:
Improvecorrection precisionVSAvoiddata handling efficiency
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent uses replica memories that are identical copies of primary memories, allowing the system to maintain high correction precision through multiple memory structures while improving data handling efficiency by enabling parallel update operations and reducing the burden on any single memory structure.

Inventive Principle:
Principle #26Copying

Data Source

PatentEP4661296A1Techniques for receiver non-linearity calibration
Publication Date: 2025.12.10 ANALOG DEVICES INC
  • EP4661296A1 patent drawingFigure 1
  • EP4661296A1 patent drawingFigure 2
  • EP4661296A1 patent drawingFigure 3

AI summary

Various techniques are described for correcting distortion in an analog input signal after digitization in a receiver signal chain. The techniques include a system that stores concatenated distortion correction terms, allowing for efficient data handling and processing. The techniques further include a system that has a smaller number of replica memories compared to primary memories, which store operational data. The replica memories are updated with new data and may be swapped with primary memories to update them without interrupting system operations. The techniques further include a dither system that uses two memories to store and process the dithered signals, which are then combined to produce a noise-corrected digital output. The techniques further include a system to correct distortions in analog input signals processed through multiple parallel paths.