Receiver Circuit Phase Determination Using Digital Eye Pattern Analysis
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current receiver circuits face challenges in accurately determining the phase relationship between clock signals and data signals, leading to errors in distinguishing between 0 and 1, especially when the phase is shifted by a ½ unit interval, which affects transmission speed and error rates.
Innovation Solution
A receiver circuit that includes an input ADC, boundary phase computation circuit, eye pattern computation circuit, and determination circuit to calculate the maximum amplitude phase and value of the input data signal, allowing for interpolation-based data recovery without requiring an analog-circuit-based clock generator, thereby reducing process variations and improving design productivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If an analog-circuit-based clock generator is used to determine phase relationship, then phase accuracy can be achieved, but device complexity and process variations increase
Solution Approach 1:
The patent replaces the analog-circuit-based clock generator with a digital signal processing approach. The receiver circuit uses an ADC to convert the input data signal to sample data, then employs digital computation circuits to determine the boundary phase and maximum amplitude phase. This substitution of analog mechanisms with digital processing eliminates the need for complex analog circuitry while maintaining phase determination accuracy.
Solution Approach 2:
The patent creates a digital copy of the phase determination process. Instead of using physical analog circuits to generate and compare clock signals, the system samples the data signal, creates a digital representation (sample data), and processes this copy through computation circuits to determine phase relationships. This copying approach simplifies the hardware while preserving measurement functionality.
2Device complexity
If data is sampled at fixed phase, then device complexity is reduced, but error rate increases due to phase shift
Solution Approach 1:
The patent transforms the fixed sampling approach into a dynamic phase adjustment system. The boundary phase computation circuit and eye pattern computation circuit continuously analyze the sample data to determine the optimal sampling phase (maximum amplitude phase). This dynamic adaptation allows the system to adjust the sampling phase based on actual signal characteristics, thereby maintaining high data distinction accuracy without requiring complex analog circuitry.
Solution Approach 2:
The patent implements a feedback mechanism where the sample data is used to compute the boundary phase and maximum amplitude phase, which then feeds back into the determination of the input data signal value. This feedback loop ensures that the sampling phase is continuously optimized based on the actual signal characteristics, improving reliability while keeping the device structure relatively simple.
3Productivity
If transmission speed is increased, then productivity improves, but phase relationship determination becomes more difficult
Solution Approach 1:
The patent performs preliminary actions by first converting the input data signal to sample data through the ADC, then computing the boundary phase and maximum amplitude phase before final data determination. This preliminary processing of the signal in discrete samples allows the system to maintain accurate phase relationship detection even at high transmission speeds, as the digital computation can operate at the required data rates without the limitations of analog circuit response times.
Data Source
AI summary
A receiver circuit includes: an input ADC configured to convert an input data signal to sample data in accordance with a clock; a boundary phase computation circuit configured to determine the boundary phase of the input data signal based on the sample data; an eye pattern computation circuit configured to compute a maximum amplitude phase of an eye pattern of the input data signal based on the sample data and the boundary phase; and a determination circuit configured to determine a value of the input data signal in the maximum amplitude phase based on the sample data and the maximum amplitude phase.