Receiver Circuit Multi-Level Signal Equalization

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Solution Overview

Problem

Existing receiver circuits for multi-level signal transmission in semiconductor circuits face challenges with feedback time and increased power consumption due to direct feedback and loop unrolled methods, respectively.

Innovation Solution

A receiver circuit design that incorporates a first and second buffer to generate input signals based on reference voltages, and a sampling circuit that employs both direct feedback and loop unrolled equalization methods to sample these signals, allowing for selection of the best sampling result based on previous signal logic levels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If direct feedback method is used for equalization, then feedback time is secured, but circuit area and power consumption increase

Engineering Contradiction:
Improvefeedback timeVSAvoidcircuit area
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The equalization function is segmented into multiple sampling circuits, each handling different aspects of signal sampling. The first sampling circuit performs initial sampling with direct feedback, while the second sampling circuit performs additional sampling with loop unrolled equalization, dividing the complex equalization task into manageable segments that can be optimized independently

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically switches between different equalization methods (direct feedback and loop unrolled) based on signal conditions. The sampling circuits can adaptively select which equalization method to apply, allowing the system to optimize performance for different signal scenarios without being locked into a single fixed approach

Inventive Principle:
Principle #15Dynamics

2Loss of time

If loop unrolled method is used for equalization, then feedback time is reduced, but circuit area and power consumption increase

Engineering Contradiction:
Improvefeedback timeVSAvoidpower consumption
Core Design Contradiction:
Loss of timeVSUse of energy by moving object

Solution Approach 1:

The equalization function is segmented into multiple sampling circuits, each handling different aspects of signal sampling. The first sampling circuit performs initial sampling with direct feedback, while the second sampling circuit performs additional sampling with loop unrolled equalization, dividing the complex equalization task into manageable segments that can be optimized independently

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of implementing full loop unrolled equalization throughout the entire signal path, the patent applies loop unrolled equalization partially - specifically in the second sampling circuit for additional sampling operations. This partial application provides the benefits of reduced feedback time while limiting the overall power consumption increase to only the portions of the circuit where loop unrolled equalization is actively used

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If multiple equalization methods are implemented simultaneously, then equalization effectiveness is improved, but device complexity increases

Engineering Contradiction:
Improveequalization effectivenessVSAvoidcircuit area
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The equalization function is segmented into multiple sampling circuits, each handling different aspects of signal sampling. The first sampling circuit performs initial sampling with direct feedback, while the second sampling circuit performs additional sampling with loop unrolled equalization, dividing the complex equalization task into manageable segments that can be optimized independently

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent merges multiple equalization methods (direct feedback and loop unrolled) into a unified receiver circuit structure where both methods operate simultaneously but independently. The sampling circuits are configured to execute both equalization approaches and combine their results, achieving enhanced equalization effectiveness without requiring a complete redesign of the entire receiver architecture

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20250119170A1Receiver circuit
Publication Date: 2025.04.10 SK HYNIX INC
  • US20250119170A1 patent drawing
  • US20250119170A1 patent drawing
  • US20250119170A1 patent drawing

AI summary

A receiver circuit includes a first buffer, a second buffer, and a sampling circuit. The first buffer receives a multi-level signal according to a first reference voltage to generate a first input signal. The second buffer receives the multi-level signal according to a second reference voltage to generate a second input signal. The sampling circuit samples each of the first input signal and the second input signal according to a first equalization method and a second equalization method, respectively, and outputs at least one of a first sampling result value according to the first equalization method and a second sampling result value according to the second equalization method according to a logic value of a previously input multi-level signal.