Differential Receiver Circuit With Variable Resistance for Skew Correction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In high-speed interfaces like LVDS and MIPI, characteristic variations between data and clock amplifiers lead to waveform skew due to process variations, causing distortion and reducing communication speed.
Innovation Solution
A reception circuit with variable resistance units in differential stages that adjust resistance values to minimize voltage differences between amplified signals, correcting the operating point using DC power to synchronize data and clock signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If data amplifier and clock amplifier are manufactured with the same configuration, then manufacturing complexity is reduced, but waveform skew occurs due to characteristic variations
Solution Approach 1:
The patent applies asymmetry by introducing a variable resistance unit specifically in the clock amplifier's current path, creating an asymmetric configuration between data and clock amplifiers. This deliberate asymmetry compensates for the symmetric manufacturing variations, allowing independent adjustment of clock signal characteristics to eliminate waveform skew while maintaining simple manufacturing processes.
Solution Approach 2:
The patent changes the resistance parameter in the clock amplifier's current path using a variable resistance unit. By adjusting the resistance value, the clock amplifier's characteristics can be fine-tuned to match the data amplifier despite process variations, thereby reducing waveform skew without requiring complete redesign of the amplifier configuration.
2Manufacturing precision
If variable resistance unit is added to adjust resistance values, then waveform skew is reduced, but device complexity increases
Solution Approach 1:
The variable resistance unit acts as an intermediary element between the power supply and the clock amplifier's current path. It provides a simple, isolated adjustment mechanism that does not require complex circuit restructuring. The variable resistance unit mediates the relationship between power supply and amplifier, enabling precise control of clock signal characteristics with minimal added complexity.
Solution Approach 2:
The patent applies local quality by placing the variable resistance unit only in the clock amplifier's current path rather than redesigning the entire amplifier circuit. This localized adjustment allows precise control of clock signal characteristics without affecting the data amplifier or requiring global circuit restructuring, thereby minimizing the increase in device complexity.
3Manufacturing precision
If DC power is used to adjust operating point, then synchronization between data and clock is improved, but power consumption increases
Solution Approach 1:
The patent applies preliminary action by using DC power to pre-adjust the operating point of the clock amplifier during the initialization or calibration phase. This preliminary adjustment establishes the correct synchronization between data and clock signals before normal operation begins. Once synchronized, the system maintains this state without requiring continuous power consumption for adjustment, thereby minimizing ongoing power usage while achieving precise synchronization.
Data Source
AI summary
Provided is a reception circuit that suppresses skew of a waveform of a signal and enables high-speed data communication.A reception circuit according to the present disclosure includes: a first differential stage that receives a first input signal and a second input signal at a first input unit and a second input unit, respectively, and causes first and second currents corresponding to the first and second input signals, respectively, to flow; a second differential stage including a first current path that generates and outputs a first amplified signal corresponding to the first current and a second current path that generates and outputs a second amplified signal corresponding to the second current; a power supply line that supplies power to the first and second differential stages; and at least one variable resistance unit provided in the first or second current path.