Receiver Clock Synchronization via Asymmetric Delay Calculation
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Solution Overview
Problem
Existing communication modes based on the IEEE1588 PTP standard and techniques like JP 2010-232845A face challenges in accurately correcting the clock time in receivers due to mismatched forward-path and return-path delay times, and require pre-provided minimum delay values, leading to potential inaccuracies in clock synchronization.
Innovation Solution
A receiver is designed with units to calculate first and second delay times based on transmission and reception times, and a time difference is calculated using these delay times without a filter, isolating a fixed delay component to improve clock synchronization accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a communication mode based on IEEE1588 PTP standard is employed, then clock time correction can be performed, but accurate correction cannot be achieved when forward-path delay time is not equal to return-path delay time
Solution Approach 1:
The patent segments the delay time into two separate measurements: forward-path delay time (from transmitter to receiver) and return-path delay time (from receiver to transmitter). By calculating these delays separately using different message exchanges (Sync/Follow_Up for forward path, Delay_Req/Delay_Resp for return path), the system avoids the erroneous assumption that they are equal, thereby improving clock time correction accuracy in asymmetric network conditions.
2Measurement precision
If cumulative operation on difference between reception and transmission time differences is performed, then forward-path delay time can be estimated, but minimum value of delay time must be provided in advance
Solution Approach 1:
The patent enables the receiver to self-determine the forward-path delay time through cumulative operation on the difference between reception and transmission time differences of temporally adjacent synchronization control packets. This eliminates the need for external provision of minimum delay values, as the system automatically adapts to actual network conditions by computing delay based on observed packet timing variations.
3Measurement precision
If filter is used to calculate fixed delay component, then delay calculation can be performed, but control delay increases and accuracy decreases
Solution Approach 1:
The patent extracts the fixed delay component from the total delay by using logical operations on the minimum values of forward-path and return-path delay times. Specifically, it calculates fixed delay as (minimum forward-path delay + minimum return-path delay) / 2, removing the need for filter-based processing. This approach eliminates control delay introduced by filters while maintaining accurate fixed delay component calculation.
Data Source
AI summary
There is provided a receiver including a first delay time calculating unit configured to calculate a first delay time indicating a time lag between transmission of a transmission signal by a transmitter and reception of the transmission signal by the receiver, a second delay time calculating unit configured to calculate a second delay time indicating a time lag between transmission of a response signal by the receiver and reception of the response signal by the transmitter, and a time difference calculating unit configured to calculate a time difference between a time of a clock in the transmitter and a time of a clock in the receiver.