Receiver DFE Circuit With Common-Mode Feedback for Stable Gain

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Solution Overview

Problem

Semiconductor integrated circuits face challenges in effectively compensating for transmission line losses, leading to intersymbol interference (ISI) that increases error possibilities during data restoration in high-speed serial communication systems.

Innovation Solution

A semiconductor integrated circuit incorporating a decision feedback equalizer (DFE) circuit with a current injection mechanism, which includes a differential amplification circuit, active inductor load circuits, and a common mode feedback (CMFB) system to maintain stable common mode voltage and suppress gain fluctuations, thereby reducing errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a decision feedback equalizer (DFE) circuit is used to compensate transmission line losses, then the compensation effectiveness is improved, but gain fluctuations occur due to common mode voltage variations

Engineering Contradiction:
Improvecompensation effectivenessVSAvoidgain stability
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent implements a common mode feedback circuit that detects common mode voltage variations and generates a compensation signal to adjust the tail current of the differential pair. This feedback mechanism actively counteracts gain fluctuations caused by common mode voltage changes, thereby maintaining stable equalization performance while preserving the compensation effectiveness of the DFE circuit.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent dynamically adjusts the tail current parameter of the differential pair based on common mode voltage conditions. By changing this electrical parameter in response to detected common mode variations, the circuit compensates for gain fluctuations and maintains stable operation throughout the equalization process.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If tap coefficients are increased to improve equalization performance, then data restoration accuracy is improved, but circuit complexity and power consumption increase

Engineering Contradiction:
Improvedata restoration accuracyVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent implements a variable tap coefficient mechanism that selectively activates feedback taps based on signal conditions and required equalization level. Rather than always using maximum tap coefficients, the circuit applies partial action by enabling only the necessary number of taps, thereby achieving adequate data restoration accuracy while limiting circuit complexity and power consumption to essential levels.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If transmission line losses are compensated using equalization, then signal quality is improved, but intersymbol interference increases due to gain fluctuations

Engineering Contradiction:
Improvesignal qualityVSAvoidintersymbol interference
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The common mode feedback circuit continuously monitors and compensates for gain fluctuations that would otherwise cause intersymbol interference. By maintaining stable gain through feedback control, the circuit preserves signal quality improvements from equalization while eliminating the harmful intersymbol interference effect.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent converts the potentially harmful effect of common mode voltage variations into a beneficial control signal. The common mode feedback circuit detects these variations and uses them to adjust tail current, transforming what would be a source of intersymbol interference into a mechanism for maintaining stable gain and improving overall signal quality.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS11632082B2Semiconductor integrated circuit and receiver
Publication Date: 2023.04.18 KIOXIA CORP
  • US11632082B2 patent drawing
  • US11632082B2 patent drawing
  • US11632082B2 patent drawing

AI summary

According to one embodiment, a semiconductor integrated circuit includes first and second power supply lines, first and second nodes, and first and second circuits. The first circuit is configured to supply a first current to the second power supply line, from the first node or the second node. The second circuit is configured to supply a second current from the first power supply line to the first node based on a magnitude of the first current, and to supply a third current from the first power supply line to the second node based on the magnitude of the first current.