Receiver Circuit DMRS Interference Cancellation

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Solution Overview

Problem

In mobile communication systems, particularly in LTE-Advanced, interference between non-orthogonal Demodulation Reference Signals (DMRS) ports leads to performance degradation in Multi-User MIMO scenarios, causing high estimation errors and reduced system robustness due to increased interference between antenna ports.

Innovation Solution

A receiver circuit with enhanced DMRS interference cancellation capabilities, utilizing multiple estimation and combination units to accurately estimate and subtract interfering signal components, thereby improving orthogonality and channel estimation accuracy, even in scenarios with non-orthogonal DMRS configurations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If non-orthogonal DMRS ports are used to increase system capacity, then system capacity improves, but interference between channels increases causing performance degradation

Engineering Contradiction:
Improvesystem capacityVSAvoidinterference between channels
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent converts the harmful interference between non-orthogonal DMRS ports into a beneficial signal by estimating and subtracting the interfering signal components. The receiver estimates channel responses for multiple DMRS ports including interferers, reconstructs the interfering signals using these channel estimates, and subtracts them from the received signal. This transforms the harmful interference into a predictable and removable component, allowing non-orthogonal ports to be used without performance degradation.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Object-affected harmful factors

If interference cancellation processing is added to reduce interference, then interference reduction improves, but device complexity increases

Engineering Contradiction:
Improveinterference reductionVSAvoidreceiver complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by estimating channel responses for all DMRS ports (including interferers) before the actual data detection process. The receiver performs channel estimation, signal reconstruction, and interference subtraction in advance, creating a cleaned signal that is then used for straightforward data detection. This preliminary processing separates the complex interference cancellation task from the main detection flow, making the overall system more manageable despite the added complexity.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If channel estimation accuracy is improved by processing multiple DMRS ports, then estimation accuracy improves, but processing complexity increases

Engineering Contradiction:
Improvechannel estimation accuracyVSAvoidprocessing complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the channel estimation process into separate stages for different DMRS ports. The receiver estimates channel responses for each DMRS port individually (including both desired and interfering ports), then uses these separate estimates to reconstruct and subtract interfering signals. This segmented approach allows accurate channel estimation for multiple ports without requiring a single overly complex estimation algorithm, making the processing more manageable while maintaining high accuracy.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8693971B1Receiver, receiver circuits, and methods for providing an interference-reduced signal
Publication Date: 2014.04.08 APPLE INC
  • US8693971B1 patent drawing
  • US8693971B1 patent drawing
  • US8693971B1 patent drawing

AI summary

A receiver is configured to receive a receive signal including a plurality of signal components, each signal component indicating a channel of an antenna port and an associated scrambling sequence, wherein a first one of the channels indicated by a first one of the signal components which is based on a first scrambling sequence is allocated to the receiver for data reception and a second one of the channels indicated by a second one of the signal components which is based on a second scrambling sequence different from the first scrambling sequence is interfering with the allocated channel. The receiver includes an interference reduction unit configured to combine an estimate of the first one of the signal components and an estimate of the second one of the signal components to provide an interference-reduced signal.