Receiver Signal Chain Drivers With Digital Linearity Compensation

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Solution Overview

Problem

The performance of receiver signal chains is limited by the linearity and power consumption of input circuitry driving analog-to-digital converters (ADCs), often requiring power-hungry Class A amplifiers that are not efficiently integrated with CMOS technology, leading to high power consumption and complexity.

Innovation Solution

Implementing non-optimized drivers with lower power consumption Class AB, Class B, or Class C amplifiers and using digitally-assisted optimization techniques to compensate for their non-idealities, allowing for integration with ADCs in the same semiconductor technology and reducing overall power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If Class A amplifiers are used to drive ADCs, then linearity and performance are improved, but power consumption increases significantly

Engineering Contradiction:

ImprovelinearityVSAvoidpower consumption

Core Design Contradiction:

Manufacturing precisionVSUse of energy by moving object

Solution Approach 1:

The patent changes the operating class parameter of the amplifier from Class A to Class AB, Class B, or Class C, which fundamentally alters the biasing conditions and power consumption characteristics while maintaining acceptable linearity through digital correction

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The system uses digital feedback to measure the actual output of the power-efficient amplifier and apply correction signals to compensate for non-linearities, thereby achieving Class A-level linearity with Class B/C power efficiency

Inventive Principle:

Principle #23Feedback

2Use of energy by moving object

If Class AB, Class B, or Class C amplifiers are used, then power consumption is reduced, but linearity and performance degrade

Engineering Contradiction:

Improvepower consumptionVSAvoidlinearity

Core Design Contradiction:

Use of energy by moving objectVSManufacturing precision

Solution Approach 1:

The patent introduces digital signal processing circuitry as an intermediary that receives the output from the power-efficient amplifier, measures its non-linear characteristics, and applies mathematical corrections to restore linearity before the final output

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces the traditional analog approach of achieving linearity through carefully designed analog circuitry (Class A operation) with a digital approach where non-linearities are measured and corrected through digital signal processing

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Manufacturing precision

If power-hungry circuit designs are implemented to achieve better linearity, then performance is improved, but device complexity increases

Engineering Contradiction:

ImprovelinearityVSAvoidcircuit complexity

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent replaces complex analog circuit design requirements with simpler analog circuitry combined with digital signal processing, where the complexity is shifted from the analog domain to the digital domain, enabling standard CMOS fabrication

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

4Reliability

If Class A amplifiers are used for optimal performance, then receiver signal chain performance is improved, but integration with CMOS technology becomes difficult

Engineering Contradiction:

ImproveperformanceVSAvoidintegration with CMOS

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent changes the amplifier operating class from Class A to Class AB/B/C, which are more compatible with standard CMOS technology, and compensates for the resulting performance differences through digital signal processing

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent merges the analog amplifier stage with digital signal processing circuitry in a hybrid architecture, allowing the use of power-efficient Class AB/B/C amplifiers while maintaining high performance through digital correction, all implementable in standard CMOS

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS10848169B2Receiver signal chains with low power drivers and driver optimization

Publication Date: 2020.11.24 ANALOG DEVICES INC

AI summary

Non-idealities of input circuitry of a receiver signal chain can significantly degrade the overall performance of the receiver signal chain. To meet high performance requirements, the input circuitry is typically implemented with power hungry circuitry in a different semiconductor technology from the analog-to-digital converter that the input circuitry is driving. With suitable optimization techniques, performance requirements on the input circuitry can be reduced while meeting target performance of the receiver signal chain. Specifically, optimization techniques can compensate for input frequency-dependent properties and/or amplitude-dependent properties of the input circuitry. In some cases, reducing performance requirements on the input circuitry means that the input circuitry can be implemented in the same semiconductor technology as the analog-to-digital converter.