Receiver Feed-Forward Equalization T-Coil Delay Circuit
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Solution Overview
Problem
High-speed serial links face challenges in recovering symbols due to artifacts from pre-cursors and post-cursors, which are not effectively accounted for in existing receiver circuits.
Innovation Solution
A receiver with feed-forward equalization is implemented, utilizing a delay circuit with T-coil circuits to generate delayed signals, which are then used by a front-end circuit to cancel out pre-cursor and post-cursor artifacts before signal recovery.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional receiver circuit without feed-forward equalization is used, then the device complexity is lower, but the signal integrity deteriorates due to pre-cursor and post-cursor artifacts
Solution Approach 1:
The feed-forward equalization circuit performs preliminary cancellation of pre-cursor and post-cursor artifacts from the incoming signal before the signal is processed by downstream circuits. By removing these artifacts in advance, the circuit improves signal integrity for subsequent symbol recovery operations without requiring complex post-processing.
Solution Approach 2:
The patent introduces an intermediary feed-forward equalization circuit between the input signal and the downstream symbol recovery circuits. This intermediary circuit processes the signal by canceling artifacts using delayed versions of the input signal, thereby mediating between the raw incoming signal and the cleaned signal needed for accurate symbol recovery.
2Reliability
If feed-forward equalization circuitry is added to cancel pre-cursor and post-cursor artifacts, then the signal integrity is improved, but the device complexity increases
Solution Approach 1:
The feed-forward equalization circuit is segmented into multiple independent delay elements, each generating a delayed version of the input signal. These segmented delay elements can be independently adjusted and combined to cancel specific pre-cursor and post-cursor artifacts, allowing for modular design and optimization without requiring a completely complex monolithic structure.
3Reliability
If multiple delay elements are used in the delay circuit, then the ability to cancel pre-cursor and post-cursor artifacts is improved, but the device complexity increases
Solution Approach 1:
The delay circuit employs a nested structure where delay elements are arranged in a hierarchical manner. Each delay element can be viewed as containing or being contained within a larger delay structure, allowing multiple delay functions to be implemented in a compact, organized fashion. This nesting reduces the overall complexity compared to having completely separate delay circuits for each function.
Data Source
AI summary
A receiver with feed-forward equalization is disclosed. A receiver includes a delay circuit configured to receive a first signal that encodes a serial data stream having a plurality of data symbols. The delay circuit includes at least one T-coil circuit and is configured to generate a plurality of delayed signals using the first signal. The receiver further includes a front-end circuit configured to generate an equalized signal using the at first signal and one or more delayed signals of the plurality of delayed signals. A sample circuit is configured to sample the equalized signal to generate a plurality of samples. A recovery circuit configured to generate a plurality of recovered data symbols using the plurality of samples.