Wireless Power Receiver Gate Latching for Auxiliary Power Dropout
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Solution Overview
Problem
Wireless power receivers are susceptible to failure modes due to auxiliary power source dropout, leading to over-voltage conditions that can harm transistors and diodes, as the system lacks protection mechanisms to manage voltage fluctuations effectively.
Innovation Solution
A method and system that utilize a comparator to generate a signal comparing the auxiliary power source to a predetermined threshold, triggering a fault latch to latch the transistor gates on and disconnecting the gate drivers, while gate hold-up circuits maintain the latched state for a period, ensuring the transistors remain on even when the auxiliary power drops, thereby preventing over-voltage conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the auxiliary power source is used to power gate drivers, then the transistor gates can be controlled to switch power transmission, but when the auxiliary power source drops out, over-voltage conditions occur that can harm transistors and diodes
Solution Approach 1:
The fault latch circuit is triggered in advance when the auxiliary power source voltage drops below a threshold, latching the transistor gates to the on-state before over-voltage conditions can occur. This preliminary action prevents the harmful effect by establishing a protective state proactively.
Solution Approach 2:
The gate hold-up circuits maintain the latched state of transistor gates for a predetermined period after auxiliary power dropout, cushioning against the harmful over-voltage conditions that would otherwise occur during this vulnerable transition period.
2Object-affected harmful factors
If the gate drivers are disconnected from transistor gates during auxiliary power dropout, then over-voltage protection is achieved, but the system loses the ability to control power transmission during the dropout period
Solution Approach 1:
The transistor gates are latched to the on-state in advance when the auxiliary power source fails, ensuring protection is established before control capability is lost. This allows the system to maintain a safe state even when active control is no longer possible.
Solution Approach 2:
Instead of trying to maintain active control of the transistor gates during auxiliary power dropout, the system inverts the approach by latching the gates to a fixed safe state (on-state), eliminating the need for continued active control while ensuring protection.
3Object-affected harmful factors
If the transistor gates are latched on during auxiliary power dropout, then over-voltage conditions are prevented, but the transistors remain conductive for a period that may overlap with resonator voltage duration
Solution Approach 1:
The system dynamically adjusts the transistor gate state based on the auxiliary power source status. When dropout is detected, the gates are latched to the on-state for a predetermined period, then released. This dynamic response optimizes the balance between protection and controlled operation.
Solution Approach 2:
The fault latch circuit continuously monitors the auxiliary power source voltage and provides feedback to trigger the latched state when a threshold is exceeded. This feedback mechanism ensures the protection duration is appropriately timed relative to the actual power failure condition.
Data Source
AI summary
The disclosure features systems and methods for protecting transistors of a wireless power receiver. Systems can include a gate driver configured provide a control signal to control switching of the transistor gate such that power is transmitted to a load coupled to the receiver; and a controller coupled to the gate driver and configured to generate a protection signal. The protection signal can include (i) a fault signal indicating a fault in one or more components of the receiver; (ii) a signal indicating that the transistor gate should be latched; and/or (ii) at least one undervoltage signal indicating that an undervoltage condition exists in a power supply of the gate driver. Based on the generated protection signal, the gate driver can be configured to adjust the provided control signal to latch the transistor gate such that power is not transmitted to the load.