Satellite Receiver IC Pin Sharing for Antenna Fault Detection
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Solution Overview
Problem
Satellite receiver circuits face signal loss and fault detection challenges due to the separation of the receiver circuit from the antenna, requiring additional pins for fault monitoring which increases the pin count and complexity.
Innovation Solution
An integrated circuit device with a digital control circuit, GPIO circuits, and an antenna monitoring circuit featuring an analog-to-digital converter (ADC) that selectively disconnects from connection pins to reuse external pins for analog signal capture, enabling fault detection without additional pins and reducing component count.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an antenna monitoring circuit with ADC is integrated into the IC device, then fault detection capability is improved, but the pin count increases
Solution Approach 1:
The connection pins are designed to serve multiple functions: they can be used as digital GPIO pins for general-purpose input/output operations, or alternatively connected to the ADC circuit through switching mechanisms for analog signal acquisition. This multi-functionality allows the same physical pins to support both digital communication and analog monitoring without increasing the overall pin count of the IC device.
Solution Approach 2:
The patent implements dynamic switching between different operational modes using control circuits that can connect or disconnect the ADC circuit from the connection pins based on the required function. This dynamic reconfiguration allows the system to adapt between digital GPIO mode and analog ADC mode, enabling fault detection capabilities while maintaining compatibility with existing pin assignments.
2Adaptability or versatility
If additional connection pins are added for ADC input, then analog signal capture capability is improved, but device complexity and pin count increase
Solution Approach 1:
Existing connection pins that were previously dedicated to digital GPIO functions are now designed to be shared with the ADC circuit. Through the use of switching elements and multiplexing, these same pins can be configured to accept analog signals for fault monitoring when needed, while maintaining their digital functionality when analog monitoring is not required.
Solution Approach 2:
The patent merges the digital GPIO functionality and analog ADC input functionality into a unified interface structure. By combining these previously separate functions into a single set of connection pins, the design achieves analog signal capture capability without requiring additional dedicated pins, thereby avoiding an increase in overall device complexity.
3Adaptability or versatility
If the receiver circuit is placed at a different location than the antenna, then system flexibility is improved, but signal loss increases
Solution Approach 1:
The antenna monitoring circuit continuously monitors the analog signals at the connection pins and provides feedback information about the signal quality and cable status to the control circuit. This feedback mechanism enables the system to detect faults such as short circuits or open circuits in the antenna cable, allowing for timely corrective actions to minimize signal loss and maintain optimal performance despite the physical separation between antenna and receiver circuit.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution allows for low-pin-count integration, flexible fault detection, and reduced component count by integrating ADC functionality within the control circuit, enabling efficient detection of antenna cable faults and preventing signal loss.
Implementation Method 1
an antenna monitoring circuit with an integrated analog-to-digital converter, ADC, circuit
Data Source
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AI summary
The present disclosure provides an IC device for a satellite receiver, comprising at least one digital control circuit, at least two general GPIO circuits connected, respectively, with a first connection pin (32) and a second connection pin (34), and an antenna monitoring circuit (54) comprising an ADC circuit (58), wherein a signal input of the an antenna monitoring circuit (54)is connected to the first connection pin (32), and a reference input of the an antenna monitoring circuit (54) is connected to the second connection pin (34). The at least one digital control circuit is configured, in a first mode of operation, to selectively provide an analog signal received via the signal input and the reference input to the ADC circuit (58), to capture a digital value corresponding to the analog signal using the at least one ADC circuit (58), and to compare the captured digital value with at least one programmable threshold value. The at least one digital control circuit is further configured, in a second mode of operation, to disconnect at least parts of the ADC circuit (58) from the first and the second connection pin (32, 34), and to capture or provide a respective digital value from or to at least one of the first pin (32) and the second connection pin (34) using the respective GPIO circuit. A satellite receiver system (10) is also provided.