Receiver Idle-Exit Detection With Low-Power Pattern Monitoring
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Solution Overview
Problem
Existing receivers consume significant power when continuously monitoring for pre-defined data patterns to exit from an electrical idle state, as they maintain the signal detection circuit active even in the non-idle state.
Innovation Solution
A receiver design that disables the signal detection circuit when exiting from the electrical idle state, utilizing a signal detection circuit to detect a first data pattern indicating exit from the idle state, and an analog-digital converter circuit to sample and identify normal data at a higher frequency, thereby reducing unnecessary power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the signal detection circuit continuously monitors for pre-defined data patterns to detect exit from electrical idle state, then the receiver can reliably detect normal data, but the power consumption of the signal detection circuit increases
Solution Approach 1:
The signal detection circuit operates periodically rather than continuously. It is activated only during electrical idle state to monitor for pre-defined data patterns indicating exit from idle state, and disabled during non-idle state when normal data transmission is ongoing. This periodic operation maintains detection reliability while significantly reducing power consumption.
Solution Approach 2:
The receiver performs preliminary detection of the pre-defined data pattern (K28.5) at a lower first frequency using the signal detection circuit before switching to normal data reception at a higher second frequency. This preliminary action allows the system to prepare for normal operation without maintaining full-power monitoring throughout.
2Use of energy by moving object
If the signal detection circuit operates at a lower first frequency to detect pre-defined data pattern, then power consumption is reduced, but the detection speed may be slower compared to normal data rate
Solution Approach 1:
The system performs preliminary detection of the exit-from-idle indicator (K28.5 pattern) at the lower first frequency before transitioning to normal data reception. Since the pre-defined data pattern has a known structure and appears only during idle state exit, detecting it at lower frequency is sufficient and power-efficient, while the subsequent normal data reception immediately switches to the higher second frequency to maintain speed requirements.
Solution Approach 2:
The detection process is segmented into two distinct phases: (1) idle state exit detection at lower first frequency using signal detection circuit, and (2) normal data reception at higher second frequency using analog-digital converter circuit. Each phase operates at the appropriate frequency for its specific function, optimizing both power consumption and detection speed.
3Use of energy by moving object
If the receiver switches between different data rates (first frequency and second frequency), then energy efficiency is improved, but the system complexity increases
Solution Approach 1:
The signal detection circuit is designed to handle multiple functions: detecting the pre-defined data pattern (K28.5) at the first frequency during idle state exit, and generating control signals to switch to the second frequency for normal data reception. This multi-functionality reduces the need for separate dedicated circuits for each function, thereby limiting the increase in system complexity while achieving energy efficiency.
Solution Approach 2:
The patent combines the signal detection functionality with the frequency switching control mechanism. The same signal detection circuit that detects the pre-defined pattern also triggers the frequency transition, merging detection and control functions into a unified process. This integration reduces overall system complexity compared to having separate independent systems for detection and frequency management.
Data Source
AI summary
A receiver is provided. The receives includes: a signal detection circuit configured to receive differential signals having a variable data rate, and provide a detection signal based on the differential signals corresponding to a first data pattern of a first frequency, wherein the first data pattern of the first frequency indicates an exit from an electrical idle state; an analog-digital converter circuit configured to generate sample data by sampling the differential signals at a second frequency, and identify whether the sample data corresponds to a second data pattern which indicates normal data; and a control circuit configured to enable the analog-digital converter circuit based on the detection signal, and store the sample data. The first frequency is lower than the second frequency.