Storage Receiver Jitter Testing With Internal Offset Tuning
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Solution Overview
Problem
Jitter occurring in communication paths between electronic devices due to timing interference reduces communication quality and causes errors, leading to inconsistent yield in manufacturing and classification of good and bad products.
Innovation Solution
A storage device with an internal receiver and tester circuit that collects jitter information, performs optimization operations by adjusting receiver offsets based on collected jitter data, and records test results to improve jitter-tolerance without external support.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the memory controller communicates with the external host device through a long communication path, then data transmission capability is improved, but jitter occurs due to timing interference
Solution Approach 1:
The patent implements a feedback mechanism where the memory controller monitors communication quality parameters (jitter, errors) from the long communication path and dynamically adjusts transmission parameters such as clock timing, data sampling points, and equalization settings to compensate for timing interference and maintain reliable communication
Solution Approach 2:
The patent changes physical and operational parameters including clock frequency, data sampling timing, and signal equalization parameters to optimize communication performance while mitigating jitter effects in the long communication path between memory controller and external host device
2Length of stationary object
If jitter occurs in the communication path, then communication distance is extended, but timing interference causes errors in communication process
Solution Approach 1:
The patent performs preliminary calibration and characterization of the communication path during manufacturing, storing timing offset compensation values and equalization parameters that are applied before actual communication to pre-correct for timing interference in long communication paths
Solution Approach 2:
The patent introduces intermediary signal processing functions including clock recovery circuits, equalization circuits, and jitter filtering mechanisms that act as mediators between the transmitted signal and the receiver, isolating the timing interference effects and maintaining synchronization accuracy
3Ease of operation
If traditional jitter testing is performed without internal collection capability, then test simplicity is maintained, but yield determination accuracy is reduced
Solution Approach 1:
The patent implements self-service capability where the storage device internally collects, measures, and evaluates its own jitter characteristics using built-in test circuits and sensors, eliminating the need for external testing equipment while achieving accurate yield determination through self-diagnosis and self-characterization
4Device complexity
If receiver offsets are not adjusted based on jitter information, then device complexity is reduced, but jitter-tolerance is insufficient
Solution Approach 1:
The patent implements dynamic offset adjustment mechanisms where receiver timing and voltage offsets are automatically tuned based on real-time jitter measurements and communication conditions, allowing the receiver to adapt its parameters dynamically to maintain optimal performance across varying jitter environments
Data Source
AI summary
Provided is a storage device which includes a receiver configured to receive a reception signal, filter the reception signal to generate an internal signal, and extract data from the internal signal; a tester circuit configured to, in a test operation, generate a pattern signal and a jitter signal, combine the pattern signal and the jitter signal to output the reception signal to the receiver, receive the internal signal from the receiver, compare the pattern signal and the internal signal, and output a comparison result of the pattern signal and the internal signal as a test result; and a controller configured to receive the reception signal and the comparison result.