High-Voltage Differential Receiver Using Ladder Divider Thresholding
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Solution Overview
Problem
Integrated circuit designs face challenges in reliably receiving high voltage domain I/O signals due to reduced internal power supply voltages, leading to signal saturation and increased chip area requirements for handling both differential and single-ended receivers.
Innovation Solution
The implementation of a transistor ladder voltage divider and pass gate circuitry that divides high voltage signals, coupled with modified Schmitt trigger circuits, allows for reliable signal reception in a low voltage domain by adjusting threshold levels and using shared interface circuitry for both receiver types.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If high voltage domain I/O signals are directly connected to low voltage domain receiver circuitry, then signal reception is simplified, but the amplifier saturates and cannot reliably receive signals above the common mode voltage
Solution Approach 1:
A voltage divider circuit comprising a first voltage divider and a second voltage divider is introduced as an intermediary between the high voltage domain I/O signals and the low voltage domain receiver circuitry. The first voltage divider divides the differential input signal to generate a first intermediate signal, and the second voltage divider divides the first intermediate signal to generate a second intermediate signal that is coupled to the receiver circuitry. This intermediary structure prevents amplifier saturation while maintaining reliable signal reception.
2Reliability
If complex circuit designs involving source followers, voltage regulators, and level selection logic are used to interface high voltage domain I/O signals with low voltage domain receiver circuitry, then signal reception reliability is improved, but device complexity and chip area increase
Solution Approach 1:
The voltage divider circuit is segmented into multiple independent voltage divider stages (first voltage divider and second voltage divider) that can be independently optimized. Each voltage divider consists of separate transistor branches (first branch and second branch) that can be independently controlled. This segmentation allows the circuit to handle high voltage signals through simplified stages rather than requiring a single complex interface circuit, thereby reducing overall device complexity while maintaining reliability.
3Adaptability or versatility
If separate differential receivers and single ended receivers are implemented to handle both receiver types, then both receiver types are supported, but a large amount of chip area is consumed
Solution Approach 1:
The voltage divider circuit is designed with universal functionality to handle both differential and single-ended receiver configurations. The same voltage divider structure (with first and second voltage dividers) can process differential input signals and provide appropriate intermediate signals for the receiver circuitry regardless of whether the receiver is configured as differential or single-ended. This multi-functionality eliminates the need for separate dedicated circuits for each receiver type, thereby reducing chip area consumption while maintaining adaptability to different receiver configurations.
Data Source
AI summary
A high voltage tolerant differential receiver circuit includes a voltage divider ladder that is operative to divide in half differential input signals that are greater than threshold voltages of the voltage divider ladder. A pass gate circuit is operative to receive differential input signals that are below the threshold voltage of the voltage divider ladder. Outputs from the voltage divider ladder and the pass gate circuit are provided to separate comparators. Output from the comparators are combined to generate a signal in the voltage domain of receiver circuitry.