Differential Receiver Latch with Selective Node Reset and Equalization
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Solution Overview
Problem
Semiconductor receiver circuits face challenges in achieving high receiving efficiency while being insensitive to input noise and operating with low current consumption.
Innovation Solution
The proposed receiver circuit includes a latch unit that changes logic levels of differential output terminals based on input data, a reset unit for equalization, and a control unit that generates control signals for selective node resetting, allowing for simultaneous reset and equalization functions without additional transistors, thereby improving efficiency and reducing current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the receiver circuit uses conventional separate reset and equalization circuits, then the reset function and equalization function can be performed, but the circuit complexity increases and current consumption increases
Solution Approach 1:
The patent combines the reset function and equalization function into a single integrated circuit block. The reset unit performs both functions by selectively resetting intermediate nodes based on control signals, eliminating the need for separate reset and equalization circuits. This merging reduces circuit complexity while maintaining both functions' effectiveness, directly resolving the technical contradiction between reliability and device complexity.
2Reliability
If the receiver circuit uses conventional separate reset and equalization circuits, then the reset function and equalization function can be performed, but the current consumption increases
Solution Approach 1:
The patent merges reset and equalization functions into one circuit unit that operates selectively based on control signals. By using a single integrated structure instead of two separate circuits, the total current consumption is reduced while both functions remain effective. The control unit enables the reset unit to perform appropriate operations dynamically, optimizing energy usage.
3Reliability
If the receiver circuit is designed to be insensitive to input noise, then the receiving efficiency improves, but the circuit complexity increases
Solution Approach 1:
The patent employs feedback mechanisms where the control unit monitors the state of intermediate nodes and generates appropriate control signals to maintain optimal operation. This feedback approach enables the circuit to automatically adjust and maintain noise immunity without requiring complex additional circuits. The feedback-based control achieves noise insensitivity while keeping the circuit structure relatively simple.
4Use of energy by moving object
If the receiver circuit operates with low current, then the current consumption reduces, but the receiving efficiency deteriorates
Solution Approach 1:
The patent uses periodic control signals to activate the reset function at appropriate intervals rather than continuously. The control unit generates control signals based on the reset condition and previous input data, enabling the reset unit to perform equalization and reset operations periodically when needed. This periodic action maintains receiving efficiency while significantly reducing average current consumption compared to continuous operation.
Data Source
AI summary
A receiver circuit of a semiconductor apparatus may include, a latch comprising differential input terminals and differential output terminals. The receiver circuit may also include a control unit configured to selectively reset first and second intermediate nodes coupled between the differential input terminals and the differential output terminals according to previous data.