Receiver Mixer Bias Calibration Using Analog IIP2 Correlation

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Solution Overview

Problem

Current IIP2 calibration techniques in RF receivers are hindered by the need for digital correlation, which introduces substantial delay due to ADC/DAC conversion, and face challenges in providing accurate analog computation for efficient calibration across multiple frequency bands and modes.

Innovation Solution

Implementing an analog correlator that directly processes differential voltages from the mixer outputs to generate calibration voltages, eliminating the need for digital conversion and enabling fast, efficient IIP2 calibration by integrating the correlator with the receiver circuitry, thus reducing hardware requirements and calibration time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If digital correlation is used for IIP2 calibration, then measurement precision is improved, but loss of time increases due to ADC/DAC conversion delays

Engineering Contradiction:
ImproveIIP2 calibration accuracyVSAvoidcalibration time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent replaces the digital correlation system (requiring ADC/DAC conversions) with an analog correlation system. The analog correlator directly processes down-converted signals in the analog domain, eliminating the need for digital conversion and thereby reducing calibration time while maintaining measurement precision through accurate analog computation.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Adaptability or versatility

If multiple frequency bands and modes are supported, then adaptability is improved, but loss of time increases due to repeated calibration for each band

Engineering Contradiction:
Improvemulti-band supportVSAvoidtotal calibration time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The analog correlator is designed as a universal calibration component that can serve multiple frequency bands and modes. By implementing a single analog correlation system that can be configured for different bands, the patent eliminates the need for separate digital processing chains for each band, thereby reducing total calibration time while maintaining multi-band adaptability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Loss of time

If analog computation elements are used for IIP2 calibration, then loss of time is reduced, but device complexity increases due to the need for accurate analog computation elements

Engineering Contradiction:
Improvecalibration timeVSAvoidanalog computation circuitry
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent implements an analog correlator that replicates the correlation function traditionally performed in the digital domain. By creating an analog copy of the correlation processing capability, the system achieves fast calibration without requiring complex digital processing chains, ADCs, and DACs, thereby reducing overall device complexity while maintaining the speed advantages of analog computation.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS8787864B2Receiver IIP2 analog calibration
Publication Date: 2014.07.22 QUALCOMM INC
  • US8787864B2 patent drawing
  • US8787864B2 patent drawing
  • US8787864B2 patent drawing

AI summary

Techniques for performing analog calibration of a receiver to optimize a second-order input intercept point (IIP2). In an aspect, a signal generator modeling an interferer is coupled to an adjustable input of a receiver, e.g., a gate bias voltage of a mixer. For example, the signal generator output may be a single-tone on-off keying (OOK) modulated signal. The mixer mixes the signal down to baseband, wherein an analog correlator correlates the down-converted signal with the known sequence of bits used to perform the OOK modulation. The analog correlation output is then provided to drive the bias voltage in the mixer, e.g., one or more gate voltages of transistors in the differential mixer, to optimize the overall receiver IIP2. Further aspects of the disclosure provide for calibrating receivers having multiple LNA's, and also dual or diversity receivers having multiple receive paths.