Receiver Front-End Offset Calibration Using a Replica Circuit

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Solution Overview

Problem

Receiver circuits in communication systems face challenges in compensating for DC offset voltages due to design and manufacturing errors, which are exacerbated by external environments, requiring adaptive offset calibration operations.

Innovation Solution

A receiver circuit design that includes a first stage circuit, a replica circuit, and a multiplexer, which performs waveform adjustment and amplification operations, and an offset calibration logic to adaptively compensate for DC offset voltages based on environmental changes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If adaptive offset calibration operations are performed to compensate for DC offset voltages affected by external environments, then the reliability of the analog front ends is improved, but the device complexity increases due to additional calibration circuits and control logic

Engineering Contradiction:
ImprovereliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs a replica circuit that replicates the core functionality of the first stage circuit to generate replica signals. This copied structure enables offset calibration by comparing the replica signals with actual signals, allowing the system to compensate for DC offset voltages without requiring complete redundancy of the main signal path, thus balancing reliability improvement with controlled device complexity

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The offset calibration logic dynamically adjusts calibration parameters based on detected offset conditions. By changing parameters such as the calibration enable signal state and replica circuit activation, the system adapts to environmental variations and compensates for DC offset voltages, improving reliability while managing complexity through parameter control rather than structural expansion

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If the receiver circuit processes a wide frequency bandwidth, then the adaptability to different communication standards is improved, but the manufacturing precision requirements increase due to tighter tolerance demands on analog components

Engineering Contradiction:
Improvereceivable frequency bandwidthVSAvoidmanufacturing precision
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent implements dynamic waveform adjustment operations in the first stage circuit that can adapt to different frequency ranges. The circuit transitions from static to dynamic operation, allowing it to process wide frequency bandwidths by adjusting its response characteristics in real-time, thereby reducing the impact of manufacturing tolerances while maintaining broad adaptability

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The offset calibration logic provides feedback mechanisms that continuously monitor and adjust circuit parameters to compensate for manufacturing variations. This feedback loop enables the receiver to maintain wide frequency bandwidth processing capability while compensating for imperfections introduced by manufacturing tolerances, effectively decoupling bandwidth from precision requirements

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20250247120A1Receiver circuit and a method of operating the same
Publication Date: 2025.07.31 SAMSUNG ELECTRONICS CO LTD
  • US20250247120A1 patent drawing
  • US20250247120A1 patent drawing
  • US20250247120A1 patent drawing

AI summary

A receiver circuit and a method of operating the receiver circuit are provided. The receiver circuit includes: a first stage circuit configured to perform a waveform adjustment or amplification operation on first and second input differential signals; a replica circuit configured to receive a common mode voltage and perform a waveform adjustment operation or amplification operation on the common mode voltage; a multiplexer that is configured to output one of an output of the first stage circuit and an output of the replica circuit as first and second intermediate differential signals based on an offset calibration enable signal; and an offset calibration logic configured to receive a digital signal generated based on the first and second intermediate differential signals, and perform an offset calibration operation based on the digital signal.