Data Receiver Reference Voltage Calibration for Offset Margin
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Solution Overview
Problem
Data receivers in receiving devices experience offsets due to process errors, leading to a reduction in the effective window margin for accurate comparison of data signals and reference voltages.
Innovation Solution
A receiving device that calibrates offsets in data receivers without external control, adjusting the reference voltage to achieve optimal effective window margins, regardless of the conductivity type of semiconductor elements, by using an adjustment circuit to apply an intermediate voltage and adjust the reference voltage code.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data receivers are used to compare data signals with reference voltage, then data reception function is achieved, but offset due to process error reduces effective window margin
Solution Approach 1:
The patent applies preliminary action by performing offset calibration before normal data reception operations. The receiving device uses an intermediate voltage (half of power supply voltage) to pre-adjust the reference voltage through a calibration circuit, compensating for process errors before actual data comparison begins. This preliminary calibration ensures that the reference voltage is optimally set to maximize the effective window margin for subsequent data reception.
Solution Approach 2:
The patent implements self-service through automatic offset calibration without external control signals. The receiving device autonomously generates the intermediate voltage and uses it to self-adjust its reference voltage through internal calibration circuits. This self-calibration mechanism eliminates the need for external calibration equipment or control signals, allowing the device to automatically compensate for process errors and maintain optimal comparison accuracy.
2Reliability
If reference voltage is adjusted to calibrate offset, then effective window margin is improved, but additional control circuitry is required
Solution Approach 1:
The patent applies universality by designing the calibration circuit to use the same intermediate voltage node that exists in the normal operation of the data receiver. The power supply voltage division point (VDD/2) serves dual purposes: it acts as the reference for offset calibration during initialization and as a stable reference point for normal data comparison operations. This multi-functional approach allows calibration without adding dedicated calibration-specific circuitry.
Solution Approach 2:
The patent uses an intermediate voltage (VDD/2) as a mediator in the calibration process. This intermediate voltage serves as a neutral reference point that facilitates the adjustment of the reference voltage without requiring complex control logic. By using this intermediary voltage level, the calibration circuit can systematically adjust the reference voltage in a controlled manner, simplifying the overall control architecture while achieving effective offset compensation.
3Measurement precision
If intermediate voltage is applied to calibrate data receiver, then offset calibration is achieved, but calibration time is required
Solution Approach 1:
The patent performs offset calibration as a preliminary action during the initialization phase before normal data reception begins. By using the intermediate voltage to pre-adjust the reference voltage early in the system operation, the calibration is completed once during setup, and the calibrated state is maintained throughout subsequent data reception operations. This approach ensures high calibration accuracy without requiring continuous calibration time during data transmission.
Data Source
AI summary
A receiving device includes a data pin; a data buffer including a first input terminal configured to receive a data signal from the data pin, a second input terminal configured to receive a reference voltage, and an output terminal configured to output a comparison result between the data signal and the reference voltage as an output signal, a driver electrically connected between the data pin and the first input terminal, a reference voltage control circuit configured to output the reference voltage having a voltage corresponding to a reference voltage code to the second input terminal, and an adjustment circuit configured to apply an intermediate voltage of the data signal to the first input terminal using the driver, and configured to adjust the reference voltage code such that a voltage of the output signal reaches a target state.