Multi-path Receiver Power Gating via Synchronization State Detection

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Solution Overview

Problem

Multi-path receivers consume excessive power due to unnecessary synchronization across all paths until a single path is synchronized, which is inefficient in sensor networks and local area networks.

Innovation Solution

Implementing a power reduction method that detects the state of multi-receivers and controls clock gating or power gating based on their synchronization state, reducing power consumption by suspending synchronization of less synchronized paths.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If synchronization is performed for all paths until a single path is synchronized, then synchronization reliability is improved, but power consumption increases

Engineering Contradiction:
Improvesynchronization reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The system dynamically adjusts the synchronization state of multiple receivers based on real-time detection. When one receiver achieves synchronization, the system transitions other receivers from active synchronization mode to a lower-power state, adapting the system's operational characteristics to current conditions rather than maintaining a static all-active approach

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent extracts and removes the synchronization function from receivers that have already achieved synchronization or are not needed. By detecting the synchronization state and selectively disabling synchronization for certain paths, the system eliminates unnecessary power consumption while preserving the essential synchronization capability where needed

Inventive Principle:
Principle #2Taking out (Extraction)

2Measurement precision

If all multi-receivers maintain active synchronization, then synchronization accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvesynchronization accuracyVSAvoidcontrol complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The system segments the receiver group into active and inactive subsets based on synchronization state. Instead of uniformly managing all receivers, the patent divides them into groups with different operational requirements, simplifying the overall control logic while maintaining precision where necessary

Inventive Principle:
Principle #1Segmentation

3Use of energy by moving object

If clock gating is applied to unsynchronized paths, then power consumption is reduced, but synchronization time increases

Engineering Contradiction:
Improvepower consumptionVSAvoidsynchronization time
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The system performs preliminary detection of synchronization state before applying power reduction. By detecting which receivers have already achieved synchronization, the system can proactively apply clock gating or power gating to prevent future power consumption without having to wait for power reduction to trigger the effect

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9668219B2Power reduction method for multi-path receiver including multi-receivers and the multi-path receiver
Publication Date: 2017.05.30 SAMSUNG ELECTRONICS CO LTD
  • US9668219B2 patent drawing
  • US9668219B2 patent drawing
  • US9668219B2 patent drawing

AI summary

A power reduction method for a multi-path receiver including multi-receivers, includes detecting a state of the multi-receivers, and controlling clock gating or power gating of the multi-receivers based on the state.