Receiver Managing Pre-Cursor ISI via Adaptive Sampling

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional receivers face challenges in effectively removing pre-cursor intersymbol interference (ISI) in multilevel signals, particularly when using a Mueller-Muller phase detector, which can lead to noise vulnerability and unstable clock data recovery, making it difficult to maintain a stable vertical eye margin.

Innovation Solution

A receiver design that includes a sampling circuit, clock controller, and control circuit to control the ratio of the main cursor's magnitude to the pre-cursor ISI's magnitude, using a decision feedback equalizer and adaptive threshold voltages to manage the sampling clock signal and phase detection, ensuring the receiver maintains a stable operation and sufficient eye margin.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If a Mueller-Muller phase detector is used to reduce power consumption by sampling once per UI, then power consumption is reduced, but the receiver becomes vulnerable to noise and the locking point drifts

Engineering Contradiction:
Improvepower consumptionVSAvoidnoise vulnerability and locking stability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent implements dynamic sampling by adjusting the sampling clock frequency based on signal conditions. The sampling circuit can operate at different rates - once per UI for power savings when conditions permit, or at higher rates when noise or ISI conditions require more frequent sampling for reliable detection

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system dynamically changes operational parameters including sampling frequency and threshold voltages based on detected signal conditions. The control circuit adjusts these parameters to optimize between power consumption and detection reliability, switching between operational modes as needed

Inventive Principle:
Principle #35Parameter changes

2Object-generated harmful factors

If adaptive equalizer is used to remove pre-cursor ISI, then ISI reduction is achieved, but vertical eye margin cannot be guaranteed in multilevel signals

Engineering Contradiction:
Improvepre-cursor ISIVSAvoidvertical eye margin
Core Design Contradiction:
Object-generated harmful factorsVSMeasurement precision

Solution Approach 1:

The patent applies preliminary equalization to remove pre-cursor ISI before the main detection process. By pre-processing the signal to eliminate anticipated interference from previous symbols, the system prepares the signal for more reliable threshold comparison and sampling

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary processing stage between the input signal and the phase detector. This intermediate equalization stage acts as a mediator that conditions the signal by removing pre-cursor ISI, making the subsequent detection process more reliable for multilevel signals

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If multilevel signal processing is implemented to increase bandwidth, then bandwidth is increased, but amplitude differences between main cursor values become smaller making the signal more affected by ISI

Engineering Contradiction:
ImprovebandwidthVSAvoidISI susceptibility
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent applies preliminary equalization to counteract the increased ISI susceptibility before detection. By removing pre-cursor ISI in advance, the system compensates for the reduced amplitude margins inherent in multilevel signaling, allowing high-bandwidth operation without sacrificing reliability

Inventive Principle:
Principle #9Preliminary anti-action

Data Source

PatentUS11824702B2Receiver for removing intersymbol interference
Publication Date: 2023.11.21 SK HYNIX INC
  • US11824702B2 patent drawing
  • US11824702B2 patent drawing
  • US11824702B2 patent drawing

AI summary

A receiver includes a sampling circuit configured to sample a comparison result between an input signal and a plurality of threshold voltages according to a sampling clock signal; a clock controller configured to generate the sampling clock signal according to a clock control signal; and a control circuit configure to generate the clock control signal and the plurality of threshold voltages according to a target value and an output of the sampling circuit. The control circuit operates to control a ratio of a magnitude of a main cursor of the input signal and a magnitude of a pre-cursor intersymbol interference to be the target value.