Single-Ended Receiver Reference Voltage Adjustment

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Solution Overview

Problem

In high-speed data transmission using single-ended signaling, accurate and consistent reading of data signals becomes challenging due to limited timing margins, where each bit must be read within a shorter period, and the receiver's performance is often limited by timing rather than voltage.

Innovation Solution

The solution involves adjusting a reference voltage used to sample the input signal by calculating its duty cycle and adjusting it towards a median value, allowing for accurate data transfer at higher speeds by ensuring equal time periods for sampling both 'high' and 'low' states of the signal.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by stationary object

If single-ended signaling is used with fewer wires, then power consumption is reduced, but timing margins become limited and reading accuracy deteriorates

Engineering Contradiction:
Improvepower consumptionVSAvoidreading accuracy
Core Design Contradiction:
Use of energy by stationary objectVSMeasurement precision

Solution Approach 1:

The patent adjusts the reference voltage parameter dynamically based on the received signal characteristics. By monitoring the duty cycle of the received data signal and comparing it against target values, the system modifies the reference voltage to optimize the timing margins for accurate sampling, thereby maintaining reading accuracy while using single-ended signaling with fewer wires

Inventive Principle:
Principle #35Parameter changes

2Productivity

If data transmission speed is increased, then productivity improves, but timing margins decrease and reading accuracy worsens

Engineering Contradiction:
Improvedata transmission speedVSAvoidreading accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent implements a feedback mechanism where the received data signal is fed back into the system to monitor its duty cycle characteristics. This feedback information is used to adjust the reference voltage in real-time, allowing the receiver to adapt to changing signal conditions and maintain accurate reading even at higher transmission speeds where timing margins are reduced

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system dynamically changes the reference voltage parameter based on the actual signal duty cycle measurements. By adjusting this critical parameter in response to real-time signal characteristics, the receiver can optimize its sampling timing margins to match the actual data transmission speed, thereby maintaining accuracy as speed increases

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If reference voltage is fixed, then device complexity is reduced, but timing margins are limited and adaptability deteriorates

Engineering Contradiction:
Improvereference voltage control complexityVSAvoidtiming margin adaptability
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent transitions from a static, fixed reference voltage to a dynamic, adjustable reference voltage that changes based on the received signal's duty cycle. This dynamic adjustment allows the system to adapt to varying signal conditions and optimize timing margins without requiring excessive complexity, as the adjustment is driven by direct feedback from the received signal itself

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8923442B2Reference voltage generation in a single-ended receiver
Publication Date: 2014.12.30 RAMBUS INC
  • US8923442B2 patent drawing
  • US8923442B2 patent drawing
  • US8923442B2 patent drawing

AI summary

As single-ended signaling is implemented in higher-speed communications, accurate and consistent reading of the data signal becomes increasingly challenging. In particular, single-ended links can be limited by insufficient timing margins for sampling a received input signal. A single ended receiver provides for improved timing margins by adjusting a reference voltage used to sample the input signal. A calibration pattern is provided to the receiver as the input signal, and the reference voltage is adjusted toward a median value of the signal.