Receiver Reference Voltage Calibration for Noise-Resistant Memory Inputs
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Solution Overview
Problem
In memory devices, the distribution of reference voltage to input receivers is prone to noise interference, leading to signal skew and degraded timing margins, especially when coupled to hundreds of receivers, which can hinder high-speed operation.
Innovation Solution
A method and system that generates a reference voltage by applying a test signal during calibration, varying the voltage magnitude, and determining the optimal value that allows correct signal coupling, ensuring the reference voltage is centered within the signal transition range, thus minimizing noise impact.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single reference voltage source is used and distributed to multiple input receivers, then the device complexity is reduced, but noise signals couple to reference voltage distribution lines causing timing skew and degrading timing margins
Solution Approach 1:
The patent divides the single reference voltage source into multiple local reference voltage sources distributed to different input receivers. Each input receiver has its own reference voltage source, which eliminates the common distribution lines that were susceptible to noise coupling. This segmentation isolates each receiver's reference voltage from noise on shared lines, thereby maintaining timing margins without significantly increasing overall system complexity.
2Stability of the object's composition
If the reference voltage is centered between two voltages for symmetric signaling, then differential signal skew is minimized, but when input signals lack symmetry the reference voltage must be adjusted to maintain accurate trip points
Solution Approach 1:
The patent implements a calibration mode that performs preliminary adjustment of the reference voltage before normal operation. During calibration, test signals are applied and the reference voltage is adjusted to find the optimal trip point for each input receiver. This preliminary action ensures that when asymmetric signals are applied during normal operation, each receiver already has its reference voltage optimized for accurate signal coupling, eliminating the need for continuous adjustment.
3Manufacturing precision
If the voltage range between which input signals switch is relatively small, then signal integrity is maintained, but timing skew increases when comparing to reference voltage
Solution Approach 1:
The patent applies local quality by providing each input receiver with its own locally-generated reference voltage that is optimized for that specific receiver's characteristics and input signal conditions. This local reference voltage ensures that the comparison between the small-voltage-range input signal and the reference voltage is performed with optimal matching, minimizing timing skew while preserving signal integrity. Each receiver's local reference is independently optimized rather than using a universal reference.
Data Source
AI summary
A method and system for generating a reference voltage for memory device signal receivers operates in either a calibration mode or a normal operating mode. In the calibration mode, the magnitude of the reference voltage is incrementally varied, and a digital signal pattern is coupled to the receiver at each reference voltage. An output of the receiver is analyzed to determine if the receiver can accurately pass the signal pattern at each reference voltage level. A range of reference voltages that allow the receiver to accurately pass the signal pattern is recorded, and a final reference voltage is calculated at the approximate midpoint of the range. This final reference voltage is applied to the receiver during normal operation.