Receiver Circuit Slew-Rate Compensation for Stable Duty Cycle

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Solution Overview

Problem

Conventional receiver circuits in semiconductor integrated circuits experience duty cycle variations due to process, voltage, and temperature (PVT) variations, leading to unstable output signals.

Innovation Solution

Incorporating a variation detection unit and compensation block within the receiver circuit to control the slew rate of the output signal, ensuring equal pull-up and pull-down driving forces, thereby maintaining a consistent duty cycle regardless of PVT changes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the buffering unit output voltage level changes according to PVT variation, then the receiver circuit can operate under different process, voltage and temperature conditions, but the duty cycle of the output signal becomes unstable

Engineering Contradiction:
ImprovePVT variation toleranceVSAvoidduty cycle stability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where the buffering unit output is fed back to a control unit, which adjusts the slew rate of the output signal accordingly. When the buffering unit output voltage level changes due to PVT variation, the control unit detects this change and modifies the slew rate to compensate, thereby maintaining stable duty cycle despite the initial voltage fluctuation.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent dynamically changes the slew rate parameter of the output signal based on the buffering unit output voltage level. By adjusting this temporal parameter in response to voltage variations, the system compensates for PVT effects and maintains consistent duty cycle characteristics across different operating conditions.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If the driver drives the buffering signal directly, then the circuit structure remains simple, but the output signal duty cycle varies with buffering unit output voltage changes

Engineering Contradiction:
Improvecircuit structureVSAvoidoutput signal duty cycle
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent introduces a control unit as an intermediary between the buffering unit and the driver. This control unit receives the buffering signal, determines its voltage level, and generates control signals that adjust the driver's slew rate. This intermediary component enables duty cycle stabilization without requiring complete redesign of the driver architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent transforms the static driver operation into a dynamic system where the slew rate can be adjusted in real-time. The driver transitions from a fixed-gain stage to an adaptive stage that modifies its charging and discharging rates based on feedback, enabling it to compensate for input variations while maintaining structural simplicity.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8686763B2Receiver circuit
Publication Date: 2014.04.01 MIMIRIP LLC
  • US8686763B2 patent drawing
  • US8686763B2 patent drawing
  • US8686763B2 patent drawing

AI summary

A receiver circuit includes a buffering unit configured to buffer an input signal and generate a buffering signal; a variation detection unit configured to generate a control signal according to a level of a reference voltage; a driving unit configured to drive the buffering signal and generate an output signal; and a compensation unit configured to control a slew rate of the output signal in response to the control signal.